PCF2127AT/1 NXP [NXP Semiconductors], PCF2127AT/1 Datasheet - Page 46

• Manufacturer Part Number: PCF2127AT/1
• Description: Integrated RTC, TCXO and quartz crystal
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
PCF2127A_2
Product data sheet
8.13.1 Minute and second interrupts
The control bit TI_TP (register Watchdg_tim_ctl) is used to configure whether the
interrupts generated from the second/minute timer (flag MSF in register Control_2) and
the countdown timer (flag CDTF in register Control_2) are pulsed signals or a
permanently active signal. All the other interrupt sources generate a permanently active
interrupt signal which follows the status of the corresponding flags. When the interrupt
sources are all disabled, INT remains high-impedance.
Minute and second interrupts are generated by predefined timers. The timers can be
enabled independently from one another by the bits MI and SI in register Control_1.
However, a minute interrupt enabled on top of a second interrupt will not be
distinguishable since it will occur at the same time.
The minute/second flag MSF (register Control_2) is set logic 1 when either the seconds or
the minutes counter increments according to the actually enabled interrupt (see
The MSF flag can be read and cleared by the interface.
Table 53.
When MSF is set logic 1:
MI SI Result on INT
0
1
0
1
•
•
•
•
•
•
•
•
•
•
watchdog timer
alarm
timestamp
battery switch-over
battery low detection
The flags MSF, CDTF, AF, TSFx and BF can be cleared by using the interface
The flags WDTF is read only. How it can be cleared is explained in
The flag BLF is read only. It is cleared automatically from the battery low detection
circuit when the battery is replaced
If TI_TP is logic 1 the interrupt is generated as a pulsed signal.
If TI_TP is logic 0 the interrupt is permanently active signal that remains until MSF is
cleared.
0
0
1
1
no interrupt generated
an interrupt once per minute
an interrupt once per second
an interrupt once per second
Effect of bits MI and SI on pin INT and bit MSF
All information provided in this document is subject to legal disclaimers.
Rev. 02 — 7 May 2010
Result on MSF
MSF never set
MSF set when minutes counter increments
MSF set when seconds counter increments
MSF set when seconds counter increments
Integrated RTC, TCXO and quartz crystal
PCF2127A
© NXP B.V. 2010. All rights reserved.
Section 8.11.6
Table
46 of 80
53).