CY7C66113C-XC CYPRESS [Cypress Semiconductor], CY7C66113C-XC Datasheet - Page 7

• Manufacturer Part Number: CY7C66113C-XC
• Description: Full-Speed USB (12 Mbps) Peripheral Controller with Integrated Hub
• Manufacturer: CYPRESS [Cypress Semiconductor]

Document #: 38-08024 Rev. *B
2.0
The CY7C66013C and CY7C66113C are compound devices with a full-speed USB microcontroller in combination with a USB
hub. Each device is well-suited for combination peripheral functions with hubs, such as a keyboard hub function. The eight-bit
one-time-programmable microcontroller with a 12-Mbps USB Hub supports as many as four downstream ports.
2.1
The CY7C66013C features 29 GPIO pins to support USB and other applications. The I/O pins are grouped into four ports (P0[7:0],
P1[7:0], P2[7:0], P3[4:0]) where each port can be configured as inputs with internal pull-ups, open drain outputs, or traditional
CMOS outputs. Ports 0 to 2 are rated at 8 mA per pin (typical) sink current. Port 3 pins are rated at 12 mA per pin (typical) sink
current, which allows these pins to drive LEDs. Multiple GPIO pins can be connected together to drive a single output for more
drive current capacity. Additionally, each I/O pin can be used to generate a GPIO interrupt to the microcontroller. All of the GPIO
interrupts all share the same “GPIO” interrupt vector.
The CY7C66113C has 31 GPIO pins (P0[7:0], P1[7:0], P2[7:0], P3[6:0]).
2.2
The CY7C66113C has an additional port P4[7:0] that features an additional eight programmable sink current I/O pins (DAC).
Every DAC pin includes an integrated 14-k
disabled and the output pin is driven HIGH by the internal pull-up resistor. When a ‘0’ is written to a DAC I/O pin, the internal
pull-up is disabled and the output pin provides the programmed amount of sink current. A DAC I/O pin can be used as an input
with an internal pull-up by writing a ‘1’ to the pin.
The sink current for each DAC I/O pin can be individually programmed to one of sixteen values using dedicated Isink registers.
DAC bits DAC[1:0] can be used as high current outputs with a programmable sink current range of 3.2 to 16 mA (typical). DAC
bits DAC[7:2] have a programmable current sink range of 0.2 to 1.0 mA (typical). Multiple DAC pins can be connected together
to drive a single output that requires more sink current capacity. Each I/O pin can be used to generate a DAC interrupt to the
microcontroller. Also, the interrupt polarity for each DAC I/O pin is individually programmable.
2.3
The microcontroller uses an external 6-MHz crystal and an internal oscillator to provide a reference to an internal PLL-based
clock generator. This technology allows the customer application to use an inexpensive 6-MHz fundamental crystal that reduces
the clock-related noise emissions (EMI). A PLL clock generator provides the 6-, 12-, and 48-MHz clock signals for distribution
within the microcontroller.
2.4
The CY7C66013C and CY7C66113C have 8 KB of PROM.
2.5
These parts include POR logic, a WDT, and a 12-bit free-running timer. The POR logic detects when power is applied to the
device, resets the logic to a known state, and begins executing instructions at PROM address 0x0000. The WDT is used to ensure
that the microcontroller recovers after a period of inactivity. The firmware may become inactive for a variety of reasons, including
errors in the code or a hardware failure such as waiting for an interrupt that never occurs.
2.6
The microcontroller can communicate with external electronics through the GPIO pins. An I
dates a 100-kHz serial link with an external device. There is also a Hardware-assisted Parallel Interface (HAPI) which can be
used to transfer data to an external device.
2.7
The free-running 12-bit timer clocked at 1 MHz provides two interrupt sources, 128- s and 1.024-ms. The timer can be used to
measure the duration of an event under firmware control by reading the timer at the start of the event and after the event is
complete. The difference between the two readings indicates the duration of the event in microseconds. The upper four bits of
the timer are latched into an internal register when the firmware reads the lower eight bits. A read from the upper four bits actually
reads data from the internal register, instead of the timer. This feature eliminates the need for firmware to try to compensate if the
upper four bits increment immediately after the lower eight bits are read.
GPIO
DAC
Clock
Memory
Power-on Reset, Watchdog, and Free-running Timer
I
Timer
2
Functional Overview
C and HAPI Interface
pull-up resistor. When a ‘1’ is written to a DAC I/O pin, the output current sink is
2
C-compatible interface accommo-
CY7C66013C
CY7C66113C
Page 7 of 61
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