CY7C1470V25_12 CYPRESS [Cypress Semiconductor], CY7C1470V25_12 Datasheet - Page 29

• Manufacturer Part Number: CY7C1470V25_12
• Manufacturer: CYPRESS [Cypress Semiconductor]

Switching Waveforms
Document Number: 38-05290 Rev. *O
Notes
32. For this waveform ZZ is tied LOW.
33. When CE is LOW, CE
34. The IGNORE CLOCK EDGE or STALL cycle (Clock 3) illustrated CEN being used to create a pause. A write is not performed during this cycle.
35. Device must be deselected when entering ZZ mode. See cycle description table for all possible signal conditions to deselect the device.
36. I/Os are in high Z when exiting ZZ sleep mode.
In-Out (DQ)
ADDRESS
ADV/LD
Data
ALL INPUTS
BWx
CEN
(except ZZ)
CLK
Outputs (Q)
WE
CE
I
SUPPLY
1
CLK
WRITE
D(A1)
is LOW, CE
ZZ
1
A1
2
(continued)
READ
Q(A2)
is HIGH and CE
A2
2
Figure 6. NOP, STALL and DESELECT Cycles
t ZZI
t ZZ
I DDZZ
STALL
3
3
is LOW. When CE is HIGH,CE
Figure 7. ZZ Mode Timing
D(A1)
Q(A3)
READ
A3
4
Q(A2)
WRITE
D(A4)
DON’T CARE
DON’T CARE
A4
5
High-Z
1
is HIGH or CE
STALL
6
Q(A3)
[35, 36]
2
UNDEFINED
is LOW or CE
NOP
7
[32, 33, 34]
DESELECT or READ Only
t RZZI
D(A4)
READ
Q(A5)
3
A5
t ZZREC
8
is HIGH.
DESELECT
9
CY7C1470V25
CY7C1472V25
CY7C1474V25
CONTINUE
DESELECT
Q(A5)
10
t
CHZ
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