CY7C1470V25_12 CYPRESS [Cypress Semiconductor], CY7C1470V25_12 Datasheet - Page 14

no-image

CY7C1470V25_12

Manufacturer Part Number
CY7C1470V25_12
Description
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
Partial Truth Table for Read/Write
The partial truth table for Read/Write for CY7C1472V25 follows.
Partial Truth Table for Read/Write
The partial truth table for Read/Write for CY7C1474V25 follows.
Document Number: 38-05290 Rev. *O
Notes
Read
Write – no bytes written
Write byte X(DQ
Write all bytes
12. X = “Don't Care”, H = Logic HIGH, L = Logic LOW, CE stands for all chip enables active. BW
13. Write is defined by WE and BW
14. When a write cycle is detected, all I/Os are tri-stated, even during byte writes.
15. Table only lists a partial listing of the byte write combinations. Any combination of BW
Read
Write – no bytes written
Write byte a – (DQ
Write byte b – (DQ
Write both bytes
that the desired byte write selects are asserted, see Write Cycle Description table for details.
x
a
b
Function (CY7C1472V25)
Function (CY7C1474V25)
and DQP
and DQP
and DQP
[a:d]
x
a
b
)
. See Write Cycle Description table for details.
)
)
[12, 13, 14, 15]
[12, 13, 14, 15]
[a:d]
WE
WE
is valid. Appropriate write will be done based on which byte write is active.
H
H
L
L
L
L
L
L
L
x
= L signifies at least one byte write select is active, BW
BW
H
H
x
L
L
b
All BW = L
BW
H
x
L
x
CY7C1470V25
CY7C1472V25
CY7C1474V25
BW
Page 14 of 38
x
H
H
x
L
L
= valid signifies
a

Related parts for CY7C1470V25_12