MT44K16M36 MICRON [Micron Technology], MT44K16M36 Datasheet - Page 93

• Manufacturer Part Number: MT44K16M36
• Description: 576Mb: x18, x36 RLDRAM 3
• Manufacturer: MICRON [Micron Technology]

Figure 58: Power-Up/Initialization Sequence in Multiplexed Address Mode
PDF: 09005aef84003617
576mb_rldram3.pdf – Rev. B 1/12 EN
V
V
V
V
DDQ
EXT
REF
DD
Power-up
ramp
T (MAX) = 200ms
Command
R
TT
Address
sequence text
RESET#
See power-up
High-Z
initialization
QVLD
conditions
QK#
CK#
DK#
All voltage
supplies valid
and stable
DM
in the
DK
QK
DQ
CK
t
5
IOZ = 20ns
T = 200µs (MIN)
Notes:
Stable and
valid clock
NOP
100 cycles
1. Set address bit MR0[9] HIGH. This enables the device to enter multiplexed address mode
2. Address MR0[9] must be set HIGH. This and the following step set the desired MR0 set-
3. MR1 (Ax), MR1 (Ay), MR2 (Ax), and MR2 (Ay) represent MR1 and MR2 settings in multi-
4. The above sequence must be followed in order to power up the RLDRAM device in the
5. See QVLD output drive strength status during power up and initialization in non-multi-
6. After MR2 has been issued, R
when in non-multiplexed mode operation. Multiplexed address mode can also be en-
tered at a later time by issuing an MRS command with MR0[9] HIGH. After address bit
MR0[9] is set HIGH,
command is issued.
ting after the RLDRAM device is in multiplexed address mode.
plexed address mode.
multiplexed address mode.
plexed initialization operation section.
MR1.
NOP
10,000 CK cycles (MIN)
NOP
t
DKH
t
CH
t
t
CK
DK
t
t
DKL
CL
t
MRSC must be satisfied before the two-cycle multiplexed mode MRS
MR0
MRS
1
t
MRSC
93
MR0
MRS
TT
2
(Ax)
is either High-Z or enabled to the ODT value selected in
MR0 (Ay)
Micron Technology, Inc. reserves the right to change products or specifications without notice.
NOP
t
MRSC
MR1 (Ax)
MRS
576Mb: x18, x36 RLDRAM 3
Multiplexed Address Mode
MR1 (Ay)
NOP
512 clock cycles
for DLL Reset &
ZQ Calibration
Indicates a break
in time scale
© 2011 Micron Technology, Inc. All rights reserved.
MR2 (Ax)
MRS
MR2 (Ay)
Don’t Care
or Unknown
NOP
READ Training
register specs
apply
Valid
Valid
operation
Normal