MT44K16M36 MICRON [Micron Technology], MT44K16M36 Datasheet - Page 20

• Manufacturer Part Number: MT44K16M36
• Description: 576Mb: x18, x36 RLDRAM 3
• Manufacturer: MICRON [Micron Technology]

PDF: 09005aef84003617
576mb_rldram3.pdf – Rev. B 1/12 EN
Notes:
1. I
2. I
3. Input slew rate is 1V/ns for single ended signals and 2V/ns for differential signals.
4. Definitions for I
5. CS# is HIGH unless a READ, WRITE, AREF, or MRS command is registered. CS# never tran-
6. I
7. Upon exiting standby current conditions, at least one NOP command must be issued
+1.28V ≤ V
• LOW is defined as V
• HIGH is defined as V
• Continuous data is defined as half the DQ signals changing between HIGH and LOW
• Continuous address is defined as half the address signals changing between HIGH and
• Sequential bank access is defined as the bank address incrementing by one every
• Cyclic bank access is defined as the bank address incrementing by one for each com-
sitions more than once per clock cycle.
with stable clock prior to issuing any other valid command.
DD
DD
DD
every half clock cycle (twice per clock).
LOW every clock cycle (once per clock).
mand access. For BL = 2 this is every clock, for BL = 4 this is every other clock, and for
BL = 8 this is every fourth clock.
specifications are tested after the device is properly initialized. 0°C ≤ T
mesurements use
parameters are specified with ODT disabled.
DD
≤ +1.42V,+1.14V ≤ V
DD
conditions:
t
CK (MIN),
IN
IN
Electrical Characteristics – I
≤ V
≥ V
20
IL(AC)MAX
IH(AC)MIN
t
RC (MIN), and minimum data latency (RL and WL).
DDQ
.
.
Micron Technology, Inc. reserves the right to change products or specifications without notice.
≤ +1.26V,+2.38V ≤ V
576Mb: x18, x36 RLDRAM 3
EXT
© 2011 Micron Technology, Inc. All rights reserved.
≤ +2.63V,V
DD
Specifications
REF
C
= V
≤ +95°C;
DDQ
/2.
t
RC.