S29PL-N SPANSION [SPANSION], S29PL-N Datasheet - Page 24

• Manufacturer Part Number: S29PL-N
• Description: 256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory
• Manufacturer: SPANSION [SPANSION]

7.2
22
Asynchronous Read
7.2.1 Non-Page Random Read
7.2.2 Page Mode Read
Legend: L = Logic Low = V
X = Don’t Care, SA = Sector Address, A
Notes:
1.
2.
The internal state machine is set for reading array data upon device power-up, or after a hardware
reset. This ensures that no spurious alteration of the memory content occurs during the power
transition. No command is necessary in this mode to obtain array data. Standard microprocessor
read cycles that assert valid addresses on the device address inputs produce valid data on the
device data outputs. Each bank remains enabled for read access until the command register con-
tents are altered.
Address access time (t
chip enable access time (t
at the output inputs. The output enable access time is the delay from the falling edge of the OE#
to valid data at the output (assuming the addresses have been stable for at least t
The device is capable of fast page mode read and is compatible with the page mode Mask ROM
read operation. This mode provides faster read access speed for random locations within a page.
The random or initial page access is t
the locations specified by the microprocessor falls within that page) is equivalent to t
CE# is deasserted (= V
or t
gate data to the output inputs if the device is selected. Fast page mode accesses are obtained by
keeping A
Address bits A
within that page. This is an asynchronous operation with the microprocessor supplying the specific
word location. See
Read
Write
Standby
Output Disable
Reset
Temporary Sector Unprotect
(High Voltage)
The sector and sector unprotect functions may also be implemented by programming equipment.
WP#/ACC must be high when writing to the upper two and lower two sectors.
CE
. Here again, CE# selects the device and OE# is the output control and should be used to
Operation
max
– A3 constant and changing A2 – A0 to select the specific word within that page.
max
– A3 select an 8-word page, and address bits A2 – A0 select a specific word
Table 7.3
IL
ACC
, H = Logic High = V
IH
Table 7.2 Dual Chip Enable Device Operation
S29PL-N MirrorBit™ Flash Family
), the reassertion of CE# for subsequent access has access time of t
CE
) is equal to the delay from stable addresses to valid output data. The
) is the delay from the stable addresses and stable CE# to valid data
CE1# CE2# OE# WE#
for details on selecting specific words.
H
H
H
X
X
L
L
L
IN
= Address In, D
H
H
H
X
X
L
L
L
P r e l i m i n a r y
ACC
IH
,VID = 11.5–12.5 V, V
or t
H
H
X
X
X
L
CE
IN
= Data In, D
H
X
H
X
X
L
and subsequent page read accesses (as long as
RESET#
V
H
H
H
H
L
ID
OUT
HH
= 8.5 – 9.5 V,
= Data Out
WP#/ACC
(Note
X
X
X
X
X
X
2)
S29PL-N_00_A4 November 23, 2005
Addresses
(A21 – A0)
A
A
A
X
X
X
IN
IN
IN
ACC
DQ15 – DQ0
– t
PACC
High-Z
High-Z
High-Z
OE
D
D
D
OUT
. When
IN
IN
time).
ACC