S29PL-J SPANSION [SPANSION], S29PL-J Datasheet
S29PL-J
Related parts for S29PL-J
S29PL-J Summary of contents
Page 1
... Notice to Readers: This document states the current technical specifications regarding the Spansion product(s) described herein. Each product described herein may be designated as Advance Information, Preliminary, or Full Production. See Publication Number S29PL-J_00 Notice On Data Sheet Designations Revision A Amendment 9 S29PL-J Cover Sheet for definitions. Issue Date September 22, 2006 ...
Page 2
... Questions regarding these document designations may be directed to your local sales office range. Changes may also include those needed to clarify a IO S29PL S29PL-J_00_A9 September 22, 2006 ...
Page 3
... Data Retention: 20 years typical Cycling Endurance: 1 million cycles per sector typical Publication Number S29PL-J_00 This document contains information on one or more products under development at Spansion Inc. The information is intended to help you evaluate this product. Do not design in this product without contacting the factory. Spansion Inc. reserves the right to change or discontinue work on this proposed product without notice. ...
Page 4
... Note: Device PL129J has 2 chip enable inputs (CE1#, CE2#). not required for write or erase operations. PP S29PL S29PL-J_00_A9 September 22, 2006 ...
Page 5
... Password Protection Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 13.1 Password and Password Mode Locking Bit 13.2 64-bit Password . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 13.3 Write Protect (WP 13.4 High Voltage Sector Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 13.5 Temporary Sector Unprotect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 13.6 Secured Silicon Sector Flash Memory Region . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 13.7 Hardware Data Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 September 22, 2006 S29PL-J_00_A9 ( S29PL-J 3 ...
Page 6
... Revision A2 (February 17, 2004 24.4 Revision A3 (February 25, 2004 24.5 Revision A4 (February 27, 2004 24.6 Revision A5 (March 15, 2004 24.7 Revision A6 (August 30, 2004 24.8 Revision A7 (March 2, 2005 24.9 Revision A8 (July 29, 2005 24.10 Revision A9 (September 22, 2006 S29PL S29PL-J_00_A9 September 22, 2006 ...
Page 7
... Hardware Reset (RESET .75 Table 20.5 Erase and Program Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .76 Table 21.1 Temporary Sector Unprotect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .81 Table 21.2 Alternate CE# Controlled Erase and Program Operations . . . . . . . . . . . . . . . . . . . . . . . . . . .83 Table 21.3 CE1#/CE2# Timing (S29PL129J only .84 Table 21.4 Erase And Programming Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .84 September 22, 2006 S29PL-J_00_A9 ( S29PL-J 5 ...
Page 8
... Sector/Sector Block Protect and Unprotect Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . .82 Figure 21.3 Alternate CE# Controlled Write (Erase/Program) Operation Timings . . . . . . . . . . . . . . . . . . .83 Figure 21.4 Timing Diagram for Alternating Between CE1# and CE2# Control . . . . . . . . . . . . . . . . . . . . S29PL S29PL-J_00_A9 September 22, 2006 ...
Page 9
... Page Mode Features The page size is 8 words. After initial page access is accomplished, the page mode operation provides fast read access speed of random locations within that page. September 22, 2006 S29PL-J_00_A9 ( PL064J Sectors ...
Page 10
... The device electrically erases all bits within a sector simultaneously via Fowler-Nordheim tunneling. The data is programmed using hot electron injection detector that automatically inhibits write operations CC S29PL S29PL-J_00_A9 September 22, 2006 ...
Page 11
... S29PL-J Valid Combinations to be Supported for this Device Device Number/ Description S29PL127J Device Number/ Description S29PL064J Device Number/ Description S29PL032J September 22, 2006 S29PL-J_00_A9 ( Packing Type 0 = Tray 1 = Tube 2 = 7-inch Tape and Reel ...
Page 12
... Note) = 2.7 V – 3 1.65 V – 1. (See Note (See Note) ) S29PL Speed (ns) V Range IO 55, 60, 65, 70 2.7–3.6 65, 70 1.65–1.95 V Range IO 2.7–3.6 S29PL032J/S29PL064J/S29PL0127J/S29PL129J — — — — — S29PL-J_00_A9 September 22, 2006 70 — ...
Page 13
... Amax–A3 A2–A0 Notes 1. RY/BY open drain output. 2. Amax = A22 (PL127J), A21 (PL129J and PL064J), A20 (PL032J) 3. For PL129J there are two CE# (CE1# and CE2#) September 22, 2006 S29PL-J_00_A9 ( RY/BY# Sector Switches Erase Voltage ...
Page 14
... Amax = A22 (PL127J), A21 (PL064J), A20 (PL032J OE# Bank A Bank A Address X-Decoder Bank B Address Bank B X-Decoder Status Control X-Decoder Bank C Bank C Address X-Decoder Bank D Address Bank D S29PL DQ15–DQ0 Mux S29PL-J_00_A9 September 22, 2006 ...
Page 15
... STATE WE# CONTROL CE1# & CE2# COMMAND REGISTER WP#/ACC DQ0–DQ15 A21–A0 Mux Note Amax = A21 (PL129J) September 22, 2006 S29PL-J_00_A9 ( OE# CE1#=L CE2#=H Bank 1A Bank 1A Address X-Decoder Bank 1B Address Bank 1B X-Decoder Status Control ...
Page 16
... DQ15 DQ14 DQ13 DQ6 DQ12 V CC DQ4 DQ10 DQ11 DQ3 DQ8 DQ9 DQ1 CE# OE S29PL-J_00_A9 September 22, 2006 ...
Page 17
... 7.3 64-Ball Fine-Pitch BGA—MCP Compatible—PL127J Figure 7.2 64-Ball Fine-Pitch BGA, MCP Compatible, Top View, Balls Facing Down—PL127J September 22, 2006 S29PL-J_00_A9 ( RFU RFU ...
Page 18
... D2 E2 A17 A6 A5 DQ0 S29PL DQ15 DQ14 DQ13 DQ6 DQ12 V DQ4 DQ10 DQ11 DQ3 DQ8 DQ9 DQ1 CE# OE S29PL-J_00_A9 September 22, 2006 ...
Page 19
... This multi-chip compatible package set does not allow for direct package migration from the Am29BDS128H, Am29BDS128G, Am29BDS640G products, which use legacy standalone packages. September 22, 2006 S29PL-J_00_A9 ( Figure 7.4 56-Pin TSOP Configuration— ...
Page 20
... DQ11 RFU S29PL A11 A19 A12 A15 A13 A21 A10 A14 RFU DQ6 RFU A16 DQ13 DQ15 RFU DQ12 DQ7 VSS H7 H6 DQ5 DQ14 S29PL-J_00_A9 September 22, 2006 ...
Page 21
... V CC RESET# CE1#, CE2# Note Amax = A22 (PL127J), A21 (PL129J and PL064J), A20 (PL032J) 9. Logic Symbol September 22, 2006 S29PL-J_00_A9 ( Address bus 16-bit data inputs/outputs/float Chip Enable Inputs Output Enable Input Write Enable ...
Page 22
... 0 Address In High Voltage Sector Figure 20.3 on page 74 for the timing S29PL-J_00_A9 September 22, 2006 DQ15– DQ0 D OUT D IN High-Z High-Z High DQ15– DQ0 D OUT D IN High-Z High-Z High ...
Page 23
... Bank C Bank D Bank Bank 1A Bank 1B Bank 2A Bank 2B September 22, 2006 S29PL-J_00_A9 ( equal to the delay from stable addresses to valid output data. The chip enable ACC ACC or t and subsequent page read accesses (as long as the ...
Page 24
... CMOS standby current specification. S29PL and OE Word Program Table 10.4 on page 21 for write operations. when not CC Table 10.9, Secured Silicon Sector for more information CE# (CE1#,CE for read access when the CE S29PL-J_00_A9 September 22, 2006 . IH ...
Page 25
... SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 September 22, 2006 S29PL-J_00_A9 ( ns. The automatic sleep mode is independent of the ACC before the device reduces current to the stated sleep mode IH DC Characteristics on page 71 represents the automatic sleep mode current ...
Page 26
... S29PL-J_00_A9 September 22, 2006 ...
Page 27
... SA104 SA105 SA106 SA107 SA108 SA109 SA110 SA111 SA112 SA113 SA114 September 22, 2006 S29PL-J_00_A9 ( Table 10.5 PL127J Sector Architecture (Sheet Sector Address (A22-A12) Sector Size (Kwords) 00111011XXX 00111100XXX 00111101XXX 00111110XXX 00111111XXX 01000000XXX ...
Page 28
... S29PL-J_00_A9 September 22, 2006 ...
Page 29
... SA202 SA203 SA204 SA205 SA206 SA207 SA208 SA209 SA210 SA211 SA212 September 22, 2006 S29PL-J_00_A9 ( Table 10.5 PL127J Sector Architecture (Sheet Sector Address (A22-A12) Sector Size (Kwords) 10011101XXX 10011110XXX 10011111XXX 10100000XXX 10100001XXX 10100010XXX ...
Page 30
... S29PL-J_00_A9 September 22, 2006 ...
Page 31
... SA26 SA27 SA28 SA29 SA30 SA31 SA32 SA33 SA34 SA35 SA36 September 22, 2006 S29PL-J_00_A9 ( Table 10.5 PL127J Sector Architecture (Sheet Sector Address (A22-A12) Sector Size (Kwords) 11111111000 11111111001 11111111010 11111111011 11111111100 11111111101 ...
Page 32
... S29PL-J_00_A9 September 22, 2006 ...
Page 33
... SA124 SA125 SA126 SA127 SA128 SA129 SA130 SA131 SA132 SA133 SA134 September 22, 2006 S29PL-J_00_A9 ( Table 10.6 PL064J Sector Architecture (Sheet Sector Address (A22-A12) Sector Size (Kwords) 1001111XXX 1010000XXX 1010001XXX 1010010XXX 1010011XXX 1010100XXX ...
Page 34
... S29PL-J_00_A9 September 22, 2006 ...
Page 35
... SA67 SA68 SA69 SA70 SA71 SA72 SA73 SA74 SA75 SA76 SA77 September 22, 2006 S29PL-J_00_A9 ( Table 10.7 PL032J Sector Architecture (Sheet Sector Address (A22-A12) Sector Size (Kwords) 011111XXX 100000XXX 100001XXX 100010XXX 100011XXX 100100XXX ...
Page 36
... S29PL-J_00_A9 September 22, 2006 ...
Page 37
... SA1-83 SA1-84 SA1-85 SA1-86 SA1-87 SA1-88 SA1-89 SA1-90 SA1-91 SA1-92 SA1-93 SA1-94 SA1-95 SA1-96 September 22, 2006 S29PL-J_00_A9 ( Table 10.8 S29PL129J Sector Architecture (Sheet CE2# Sector Address (A21-A12 0101001XXX 0 1 0101010XXX 0 1 0101011XXX ...
Page 38
... S29PL-J_00_A9 September 22, 2006 ...
Page 39
... SA2-46 SA2-47 SA2-48 SA2-49 SA2-50 SA2-51 SA2-52 SA2-53 SA2-54 SA2-55 SA2-56 SA2-57 SA2-58 SA2-59 September 22, 2006 S29PL-J_00_A9 ( Table 10.8 S29PL129J Sector Architecture (Sheet CE2# Sector Address (A21-A12 0001011XXX 1 0 0001100XXX 1 0 0001101XXX ...
Page 40
... S29PL-J_00_A9 September 22, 2006 ...
Page 41
... September 22, 2006 S29PL-J_00_A9 ( Table 10 ...
Page 42
... DQ0 0001h 227Eh 2221h 2200h 0001h (protected 0000h (unprotected) DQ7=1 (factory locked DQ6=1 (factory and customer locked) S29PL-J_00_A9 September 22, 2006 ...
Page 43
... SA103-SA106 011000XXXXX SA107-SA110 011001XXXXX SA111-SA114 011010XXXXX SA115-SA118 011011XXXXX SA119-SA122 011100XXXXX SA123-SA126 011101XXXXX SA127-SA130 011110XXXXX September 22, 2006 S29PL-J_00_A9 ( Sector/ A22-A12 Sector Block Size 4 Kwords SA131-SA134 4 Kwords SA135-SA138 4 Kwords SA139-SA142 4 Kwords SA143-SA146 4 Kwords ...
Page 44
... Kwords 11110XXXXX 128 (4x32) Kwords SA2-124 1111100XXX 32 Kwords SA2-125 1111101XXX 32 Kwords SA2-126 1111110XXX 32 Kwords SA2-127 1111111000 4 Kwords SA2-128 1111111001 4 Kwords SA2-129 1111111010 4 Kwords SA2-130 1111111011 4 Kwords SA2-131 1111111100 4 Kwords SA2-132 1111111101 4 Kwords SA2-133 1111111110 4 Kwords SA2-134 1111111111 4 Kwords S29PL-J_00_A9 September 22, 2006 ...
Page 45
... SA111-SA114 SA115-SA118 SA119-SA122 SA123-SA126 SA127-SA130 SA131 SA132 SA133 SA134 SA135 SA136 SA137 SA138 SA139 SA140 SA141 September 22, 2006 S29PL-J_00_A9 ( A21-A12 0000000000 0000000001 0000000010 0000000011 0000000100 0000000101 0000000110 0000000111 0000001XXX 0000010XXX 0000011XXX 00001XXXXX ...
Page 46
... Unprotected—PPB not changeable, DYB is changeable Protected—PPB and DYB are changeable Protected—PPB not changeable, DYB is changeable 1 1 S29PL Table 10.9, Secured Silicon Sector State Autoselect Mode on page 39 S29PL-J_00_A9 September 22, 2006 for ...
Page 47
... PPB are needed; for example, to allow new system code to be downloaded changes are needed then the boot code can set the PPB Lock to disable any further changes to the PPBs during system operation. September 22, 2006 S29PL-J_00_A9 ( ...
Page 48
... This guarantees that a hacker could not place the device in password protection mode (The high voltage A9 Autoselect Mode also works for reading the status IH S29PL S29PL-J_00_A9 September 22, 2006 ...
Page 49
... Program and Verify commands (see “Password Verify Command”). The password function works in conjunction with the Password Mode Locking Bit, which when set, prevents the Password Verify command from reading the contents of the password on the pins of the device. September 22, 2006 S29PL-J_00_A9 ( ...
Page 50
... WP#/ACC pin, the device disables program and erase functions in the two IL on the WP#/ACC pin, the device reverts the upper two and lower two sectors placed on the RESET# pin. Refer to ID S29PL High Figure 13.1 on page 49 for details on S29PL-J_00_A9 September 22, 2006 High ...
Page 51
... Yes Remove V ID from RESET# Write reset command Sector Protect complete Device failed Sector Protect September 22, 2006 S29PL-J_00_A9 ( START Protect all sectors: PLSCNT = 1 The indicated portion of the sector protect algorithm must be RESET ...
Page 52
... IL 56). After the system has written the Enter Secured Silicon S29PL During this mode, formerly protected ID is removed from the ID Figure 13.2 on page 50 shows the Enter/Exit Secured S29PL-J_00_A9 September 22, 2006 ...
Page 53
... Secured Silicon Sector Protection Bits The Secured Silicon Sector Protection Bits prevent programming of the Secured Silicon Sector memory area. Once set, the Secured Silicon Sector memory area contents are non-modifiable. September 22, 2006 S29PL-J_00_A9 ( Figure 13 ...
Page 54
... CE# (CE1# = CE2# in PL129J and OE during power up, the device does not accept Table 14.4 on page 54. To terminate reading CFI data, the system must S29PL greater than V . The CC LKO is greater Table 14.1 to S29PL-J_00_A9 September 22, 2006 ...
Page 55
... September 22, 2006 S29PL-J_00_A9 ( Table 14.1 CFI Query Identification String Data 0051h 0052h Query Unique ASCII string “QRY” 0059h 0002h Primary OEM Command Set ...
Page 56
... Not Supported Word Page Word Page ACC (Acceleration) Supply Minimum 0085h 00h = Not Supported, D7-D4: Volt, D3-D0: 100 mV ACC (Acceleration) Supply Maximum 0095h 00h = Not Supported, D7-D4: Volt, D3-D0: 100 mV S29PL Description N byte N Description S29PL-J_00_A9 September 22, 2006 ...
Page 57
... Reset Command on page See also Requirements for Reading Array Data on page 20 on page 72 provides the read parameters, and September 22, 2006 S29PL-J_00_A9 ( Table 14.4 Primary Vendor-Specific Extended Query (Continued) Data Top/Bottom Boot Sector Flag ...
Page 58
... shows the address and data requirements. To determine sector protection shows the address and data requirements for both command sequences. See also for further information. Note that the ACC function S29PL Table 10.4 S29PL-J_00_A9 September 22, 2006 ...
Page 59
... In addition, the WP#/ACC pin must not be left floating or unconnected; inconsistent behavior of the device may result. Figure 15.1 on page 58 Operations on page 76 September 22, 2006 S29PL-J_00_A9 ( Table 15.1 on page 62 shows the address and data requirements for the program for information on these status bits ...
Page 60
... Refer to the tables in for parameters, and Figure 20.8 on page 78 S29PL START Write Program Data Poll from System Verify Data? No Yes Last Address? Yes Programming Completed shows the address and data requirements Erase/Program for timing diagrams. S29PL-J_00_A9 September 22, 2006 ...
Page 61
... Notes 1. See Table 15.1 on page 62 2. See the section on DQ3 for information on the sector erase timer. September 22, 2006 S29PL-J_00_A9 ( Write Operation Status on page 64 illustrates the algorithm for the erase operation. Refer to the tables in for parameters, and Figure 20 ...
Page 62
... Write Operation Status on page 64 Write Operation Status on page 64 Table 10.9, Secured Silicon Sector Addresses S29PL for information on these for more information. for details. After programming a µµ S29PL-J_00_A9 September 22, 2006 ...
Page 63
... Program Suspend mode and continue the programming operation. Further writes of the Program Resume command are ignored. Another Program Suspend command can be written after the device has resumed programming. 15.10 Command Definitions Tables Table 15.1 on page 62 September 22, 2006 S29PL-J_00_A9 ( contains the Memory Array Command Definitions. S29PL-J ...
Page 64
... Bus Cycles (Notes 1–4) Data Addr Data Addr Data Addr (BA X00 (BA) (BA) (BA) 90 227E (10) X01 X0E X0F 90 X03 (8) XX00/ 90 (SA) X02 XX01 555 AA 2AA 55 555 80 555 AA 2AA S29PL-J_00_A9 September 22, 2006 Data (10 ...
Page 65
... Notes 1. See Table 10.1 on page 20 2. All values are in hexadecimal. 3. Shaded cells in table denote read cycles. All other cycles are write operations. September 22, 2006 S29PL-J_00_A9 ( Table 15.2 Sector Protection Command Definitions Bus Cycles (Notes 1-4) ...
Page 66
... and the following subsections describe the function of these bits. DQ7 shows the outputs for Data# Polling on DQ7. Figure 20.10 on page 79 shows the Data# Polling timing diagram. S29PL Figure 16.1 on page 65 shows the S29PL-J_00_A9 September 22, 2006 ...
Page 67
... If not all selected sectors are protected, the Embedded Erase algorithm erases the unprotected sectors, and ignores the selected sectors that are protected. September 22, 2006 S29PL-J_00_A9 ( Figure 16 ...
Page 68
... DQ5 = 1? Yes Read DQ7–DQ0 Addr = VA Yes DQ7 = Data? No FAIL DQ2: Toggle Bit II on page 67 for more information. S29PL Figure 16.2 on page 66 shows the toggle Figure 20.12 on page 80 DQ2: Toggle Bit II on page PASS S29PL-J_00_A9 September 22, 2006 67. DQ6: ...
Page 69
... DQ5 produces a “1.” Under both these conditions, the system must write the reset command to return to the read mode (or to the erase-suspend-read mode if a bank was previously in the erase-suspend-program mode). September 22, 2006 S29PL-J_00_A9 ( compare outputs for DQ2 and DQ6 ...
Page 70
... S29PL Sector Erase Command DQ5 DQ2 (Note 1) DQ3 (Note 2) 0 N/A No toggle 0 1 Toggle 0 N/A Toggle Data Data Data 0 N/A N/A Invalid Invalid Invalid (Not Allowed) (Not Allowed) (Not Allowed) Data Data Data S29PL-J_00_A9 September 22, 2006 RY/BY DQ5: ...
Page 71
... Exposure of the device to absolute maximum rating conditions for extended periods may affect device reliability 20 ns +0.8 V –0.5 V –2 Maximum Negative Overshoot Waveform September 22, 2006 S29PL-J_00_A9 ( (Note 2) (Note 3) +0.5 V. During voltage transitions, input or I/O pins may overshoot Figure 17 ...
Page 72
... Note: For all AC and DC specifications ................–40°C to +85° ................–25°C to +85° contact your local sales office for other S29PL options. IO S29PL-J_00_A9 September 22, 2006 ...
Page 73
... Automatic sleep mode enables the low power mode when addresses remain stable for t 5. Not 100% tested S29PL129J there are two CE# (CE1#, CE2#). 7. Valid CE1#/CE2# conditions: (CE1 September 22, 2006 S29PL-J_00_A9 ( Table 19.1 CMOS Compatible ...
Page 74
... Device Under Test 1.8 V (PL127J and PL129J) IO All Speeds Unit 1 TTL gate 0.0 - 1.8 V 0.0–3 Outputs Steady Changing from Changing from Changing, State Unknown Center Line is High Impedance State (High Z) S29PL-J_00_A9 September 22, 2006 L ...
Page 75
... Valid CE1# / CE2# transitions: (CE1 Valid CE1# / CE2# transitions: (CE1# = CE2 For 70 pF Output Load Capacitance will be added to the above t September 22, 2006 S29PL-J_00_A9 ( Figure 20.2 Input Waveforms and Measurement Levels ...
Page 76
... During CE2# transitions, CE1 Figure 20.4 Page Read Operation Timings Same Page Aa t PACC t ACC Qa ; During CE2# transitions, CE1 S29PL High Z Valid Data PACC PACC S29PL-J_00_A9 September 22, 2006 ...
Page 77
... RY/BY# CE#, OE# RESET# Notes 1. S29PL129J - During CE1# transitions, CE2 S29PL129J - There are two CE# (CE1#, CE2#). In the below waveform CE# = CE1# or CE2# September 22, 2006 S29PL-J_00_A9 ( Table 20.4 Hardware Reset (RESET#) Description (See Note) Figure 20.5 Reset Timings ...
Page 78
... Min 30 35 Min 0 Min 25 30 Min 0 Min 10 Min 0 Min 0 Min 0 Min 35 Min 20 25 Min 0 Typ 6 Typ 4 Typ 0.5 Min 50 Min 0 Max 90 Min 35 Max 35 Max 35 IH S29PL-J_00_A9 September 22, 2006 Unit µs µs sec µ µs µs ...
Page 79
... S29PL129J - During CE1# transitions, CE2 S29PL129J - There are two CE# (CE1#, CE2#). In the above waveform CE# = CE1# or CE2 WP#/ACC t VHH September 22, 2006 S29PL-J_00_A9 ( Figure 20.6 Program Operation Timings ...
Page 80
... WPH 55h 30h 10 for Chip Erase Write Operation Status on page 64 ; During CE2# transitions, CE1 S29PL Read Status Data WHWH2 Status D OUT t t BUSY RB S29PL-J_00_A9 September 22, 2006 ...
Page 81
... BUSY RY/BY# Note VA = Valid address. The illustration shows first status cycle after command sequence, last status read cycle, and array data read cycle September 22, 2006 S29PL-J_00_A9 ( Figure 20.9 Back-to-back Read/Write Cycle Timings t RC ...
Page 82
... During CE2# transitions, CE1 Figure 20.12 DQ2 vs. DQ6 Enter Erase Suspend Program Erase Erase Suspend Suspend Read Program S29PL Valid Valid Data Status (stops toggling) Erase Resume Erase Erase Complete Read S29PL-J_00_A9 September 22, 2006 ...
Page 83
... Note Not 100% tested RESET CE# WE# RY/BY# September 22, 2006 S29PL-J_00_A9 ( Table 21.1 Temporary Sector Unprotect Description V Rise and Fall Time (See Note Rise and Fall Time (See Note) HH RESET# Setup Time for Temporary Sector Unprotect ...
Page 84
... S29PL129J - There are two CE# (CE1#, CE2#). In the above waveform CE# = CE1# or CE2 Valid* 60h Sector Group Protect: 150 µs Sector Group Unprotect During CE2# transitions, CE1 S29PL Valid* Valid* Verify 40h Status S29PL-J_00_A9 September 22, 2006 ...
Page 85
... PA = program address sector address program data. 3. DQ7# is the complement of the data written to the device S29PL129J - During CE1# transitions, CE2 S29PL129J - There are two CE# (CE1#, CE2#). In the above waveform CE# = CE1# or CE2# September 22, 2006 S29PL-J_00_A9 ( Description (Notes) ...
Page 86
... Unit CCR Max (Note 2) Unit Comments 2 sec 216 sec Excludes 00h programming prior to erasure (Note 4) 113.6 sec 62.4 sec Excludes system level 100 µs overhead (Note 5) 60 µs 200 sec 50.4 sec 25.2 sec , 100,000 cycles. Additionally, programming typicals CC S29PL-J_00_A9 September 22, 2006 Table 15.1 ...
Page 87
... OUT C IN2 C IN3 Notes 1. Sampled, not 100% tested. 2. Test conditions T = 25° 1.0 MHz. A September 22, 2006 S29PL-J_00_A9 ( Parameter Description Test Setup Input Capacitance Output Capacitance Control Pin Capacitance WP#/ACC Pin Capacitance S29PL-J Typ ...
Page 88
... WHEN THERE IS AN ODD NUMBER OF SOLDER BALLS IN THE OUTER ROW PARALLEL TO THE DIMENSION, RESPECTIVELY 0.000. WHEN THERE IS AN EVEN NUMBER OF SOLDER BALLS IN THE OUTER ROW e/2 BALLS. MARK, METALLIZED MARK INDENTATION OR OTHER MEANS. S29PL-J_00_A9 September 22, 2006 CORNER 3329 \ 16-038.25b ...
Page 89
... D 11.60 BSC. E 8.00 BSC. D1 8.80 BSC. E1 7.20 BSC φb 0.33 --- e 0.80 BSC 0.40 BSC. (A2-9,B1-4,B7-10,C1-K1, M2-9,C10-K10,L1-4,L7-10, G5-6,F5-6) September 22, 2006 S29PL-J_00_A9 ( 0.05 C (2X) TOP VIEW 0. 0. SEATING PLANE SIDE VIEW NOTES: MAX NOTE 1.00 OVERALL THICKNESS --- BALL HEIGHT 0 ...
Page 90
... WHEN THERE IS AN EVEN NUMBER OF SOLDER BALLS IN THE OUTER ROW e/2 8. NOT USED. 9. "+" INDICATES THE THEORETICAL CENTER OF DEPOPULATED BALLS CORNER TO BE IDENTIFIED BY CHAMFER, LASER OR INK MARK, METALLIZED MARK INDENTATION OR OTHER MEANS. S29PL-J_00_A9 September 22, 2006 CORNER 3338 \ 16-038.25b ...
Page 91
... E 7.00 BSC. D1 5.60 BSC. E1 5.60 BSC φb 0.35 0.40 e 0.80 BSC 0.40 BSC. A1,A8,D4,D5,E4,E5,H1,H8 September 22, 2006 S29PL-J_00_A9 ( NXφb TOP VIEW 0.05 C (2X) 0. 0.08 SEATING PLANE SIDE VIEW NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994. ...
Page 92
... LEAD COPLANARITY SHALL BE WITHIN 0.10MM (0.004") AS MEASURED FROM THE SEATING PLANE. 9 DIMENSION "e" IS MEASURED AT THE CENTERLINE OF THE LEADS. S29PL 0. - SEATING PLANE A 0.08MM (0.0031" A WITH PLATING ( BASE METAL SECTION B-B e/2 - DETAIL B S29PL-J_00_A9 September 22, 2006 e ...
Page 93
... Clarified the supply voltages that apply to the PL127J/PL129J and all other PLxxxJ products. BGA Pin Capacitance Added information applicable to the C Package Drawings Removed the 9x8 mm package drawing. September 22, 2006 S29PL-J_00_A9 ( symbol. IN3 ...
Page 94
... Updated the Package Types information. Figure 6, In-System Sector Protection/Sector Unprotection Algorithms Updated the illustration. Program Suspend/Program Resume Commands New section added. Made global changes to include program suspend/resume commands S29PL S29PL-J_00_A9 September 22, 2006 ...
Page 95
... VBK048—48-Ball Fine-pitch Ball Grid Array 8.15 x 6.15 mm package (PL032J and PL064J) Updated the product that uses this package from PL127J to PL064J and PL032J 24.10 Revision A9 (September 22, 2006) 64-Ball Fine-Pitch BGA—MCP Compatible—PL127J Changed ball F9 to A22 September 22, 2006 S29PL-J_00_A9 ( S29PL-J 93 ...
Page 96
... Copyright © 2004-2006 Spansion Inc. All Rights Reserved. Spansion, the Spansion logo, MirrorBit, ORNAND, HD-SIM, and combinations thereof are trademarks of Spansion Inc. Other names are for informational purposes only and may be trademarks of their respective owners S29PL S29PL-J_00_A9 September 22, 2006 ...