MC68HC705C Motorola, MC68HC705C Datasheet - Page 34

• Manufacturer Part Number: MC68HC705C
• Description: HCMOS Microcontroller Unit
• Manufacturer: Motorola

Memory
2.4 Input/Output (I/O)
2.5 RAM
Technical Data
34
NOTE:
subroutine call to save the CPU state. The stack pointer decrements
during pushes and increments during pulls.
Figure 2-1
shown in
registers. Additional I/O registers have these addresses:
The first 32 addresses of memory space, from $0000 to $001F, are the
I/O section. These are the addresses of the I/O control registers, status
registers, and data registers. See
One of four selectable memory configurations is selected by the state of
the RAM1 and RAM0 bits in the option register located at $1FDF. Reset
or power-on reset (POR) clears these bits, automatically selecting the
first memory configuration as shown in
Register.
Be careful when using nested subroutines or multiple interrupt levels.
The CPU can overwrite data in the stack RAM during a subroutine or
during the interrupt stacking operation.
•
•
•
$1FDF, option register
$1FF0, mask option register 1 (MOR1)
$1FF1, mask option register 2 (MOR2)
Figure
is a memory map of the MCU. Addresses $0000–$001F,
RAM0
0
1
0
1
2-2, contain most of the control, status, and data
Table 2-1. Memory Configurations
Memory
RAM1
0
0
1
1
Figure 2-2
RAM Bytes
176
208
272
304
Table
for more information.
2-1. See
MC68HC705C8A — Rev. 2.0
PROM Bytes
7744
7696
7648
7600
9.5.1 Option
MOTOROLA