MC68HC705C Motorola, MC68HC705C Datasheet - Page 95
MC68HC705C
Manufacturer Part Number
MC68HC705C
Description
HCMOS Microcontroller Unit
Manufacturer
Motorola
Datasheet
1.MC68HC705C.pdf
(222 pages)
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8.4.3 Timer Registers
MC68HC705C8A — Rev. 2.0
MOTOROLA
Register Name and Address: Timer Register High — $0018
Register Name and Address: Timer Register Low — $0019
TOF — Timer Overflow Flag
Bits 4–0 — Not used; these bits always read 0
The read-only timer registers (TRH and TRL) shown in
contain the current high and low bytes of the 16-bit counter. Reading
TRH before reading TRL causes TRL to be latched until TRL is read.
Reading TRL after reading the timer status register clears the timer
overflow flag bit (TOF). Writing to the timer registers has no effect.
Reset:
Reset:
Read:
Read:
Write:
Write:
The TOF bit is automatically set when the 16-bit counter rolls over
from $FFFF to $0000. Clear the TOF bit by reading the timer status
register with TOF set and then reading the low byte ($0019) of the
timer registers. Reset has no effect on TOF.
1 = Timer overflow
0 = No timer overflow
Bit 15
Bit 7
Bit 7
Figure 8-7. Timer Registers (TRH and TRL)
Capture/Compare Timer
= Unimplemented
Bit 14
Bit 6
6
Bit 13
Bit 5
5
Reset initializes TRH to $FF
Reset initializes TRL to $FC
Bit 12
Bit 4
4
Bit 11
Bit 3
3
Bit 10
Bit 2
2
Capture/Compare Timer
Timer I/O Registers
Figure 8-7
Bit 9
Bit 1
1
Technical Data
Bit 0
Bit 8
Bit 0
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