Z8S180 Zilog., Z8S180 Datasheet - Page 73
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Z8S180
Manufacturer Part Number
Z8S180
Description
ENHANCED Z180 MICROPROCESSOR
Manufacturer
Zilog.
Datasheet
1.Z8S180.pdf
(326 pages)
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58
UM005001-ZMP0400
Z 8018x Fam il y
M PU Us e r M anual
Lower Limit Address
Lower Limit Address
Common Area 1
•
•
•
CBAR is used to define the logical memory organization, while CBR and
BBR are used to relocate logical areas within the 1024KB physical
address space. The resolution for both setting boundaries within the
logical space and relocation within the physical space is 4KB.
The CA field of CBAR determines the start address of Common Area 1
(Upper Common) and by default, the end address of the Bank Area. The
BA field determines the start address of the Bank Area and by default, the
end address of Common Area 0 (Lower Common).
The CA and BA fields of CBAR may be freely programmed subject only
to the restriction that CA may never be less than BA. Figures 27 and 28
illustrate examples of logical memory organizations associated with
different values of CA and BA.
Figure 27.
Bank Area
Bank Area
Common
Common
Area 1
Area 0
0000H
MMU Common/Bank Area Register (CBAR)
MMU Common Base Register (CBR)
MMU Bank Base Register (BBR)
>
>
Logical Memory Organization
Lower lImit Address
Lower lImit Address
(RESET Condition)
Common Area 1
Bank Area
Bank Area
Common
Area 1
0000H
>
=
Lower Limit Address
Lower Limit Address
Common Area 1
Bank Area
Common
Common
Area 1
Area 0
0000H
=
>
Lower Limit Address
Lower Limit Address
Common Area 1
Bank Area
Common
Area 1
0000H
=
=
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