Z8S180 Zilog., Z8S180 Datasheet - Page 194
Z8S180
Manufacturer Part Number
Z8S180
Description
ENHANCED Z180 MICROPROCESSOR
Manufacturer
Zilog.
Datasheet
1.Z8S180.pdf
(326 pages)
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Bit
Position Bit/Field R/W
6
5
4
3
2
1
0
Z
Not Used ?
H
Not Used ?
P/V
N
C
R/W
R/W
R/W
R/W
R/W
Value
0
?
0
?
0
0
0
Description
Zero.
Z is set to 1 when instruction execution produces 0 result.
Otherwise, Z is reset to 0.
Not used
Half Carry.
H is used by the DAA (Decimal Adjust Accumulator)
instruction to reflect borrow or carry from the least
significant 4 bits and thereby adjust the results of BCD
addition and subtraction.
Not used.
P/V: Parity/Overflow.
P/V serves a dual purpose. For logical operations P/V is
set to 1 if the number of 1 bit in the result is even and P/V
is reset to 0 if the number of 1 in the result is odd. For two
complement arithmetic, P/V is set to 1 if the operation
produces a result which is outside the allowable range
(+ 127 to -128 for 8-bit operations, + 32767 to - 32768 for
16-bit operations).
Negative.
N is set to 1 if the last arithmetic instruction was a subtract
operation (SUB, DEC, CP, etc.) and N is reset to 0 if the
last arithmetic instruction was an addition operation (ADD,
INC, etc.).
Carry.
C is set to 1 when a carry (addition) or borrow (subtraction)
from the most significant bit of the result occurs. C is also
affected by Accumulator logic operations such as shifts
and rotates.
M PU Us e r M anual
UM005001-ZMP0400
Z 8018x Fam il y
179
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