Z8S180 Zilog., Z8S180 Datasheet - Page 298

• Manufacturer Part Number: Z8S180
• Description: ENHANCED Z180 MICROPROCESSOR
• Manufacturer: Zilog.

282
REQUEST PRIORITY
UM005001-ZMP0400
Request
Note: * Not acceptable when DMA Request is in level-sense.
MC: Machine Cycle
Z 8018x Fam il y
M PU Us e r M anual
Same as above.
Internal
I/O
Interrupt
NMI
Current
Status
Normal
Operation
(CPU mode
and IOSTOP
Mode)
Table 53. Request Acceptances in Each Operating Mode
The Z80180 features three types of requests.
.
Table 54. The Z80180 Types of Requests
Type 1, Type 2, and Type 3 requests priority as follows.
•
•
Type 1
Type 2
Type 3
Highest priority Type 1 Type 2
Each request priority in Type 2 is shown as follows. highest priority
Bus Req. Refresh Req. DMA Request lowest priority
WAIT State
Accepted in specified state
Accepted in each machine cycle
Accepted in each instruction
Refresh
Cycle
Interrupt
Acknowledge
Cycle
Not acceptable
Interrupt
acknowledge
cycle precedes.
NMI is accepted
after executing
DMA Cycle
Acceptable
DMA cycle
stops
Type 3 lowest priority
Refresh Request, DMA
Request, and Bus Request.
Interrupt Request
WAIT
BUS
RELEASE
Mode
SLEEP
Mode
SYSTEM
STOP
Mode
Not
acceptable
Acceptable
Return from
SYSTEM
STOP mode
to normal
operation