PF38F5070M0Y0T0 NUMONYX [Numonyx B.V], PF38F5070M0Y0T0 Datasheet - Page 61
PF38F5070M0Y0T0
Manufacturer Part Number
PF38F5070M0Y0T0
Description
Numonyx StrataFlash Wireless Memory
Manufacturer
NUMONYX [Numonyx B.V]
Datasheet
1.PF38F5070M0Y0T0.pdf
(98 pages)
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Numonyx™ StrataFlash
13.2.2
Note:
13.2.3
Caution:
November 2007
Order Number: 313295-04
Programming the Protection Registers
To program any of the Protection Registers, first issue the Program Protection Register
command at the parameter partition’s base address plus the offset to the desired
Protection Register (see
desired Protection Register data to the same Protection Register address (see
Figure 21, “Protection Register Map” on page
The device programs the 64-bit and 128-bit user-programmable Protection Register
data 16 bits at a time (see
page
Register’s address space causes a program error (SR[4] set). Attempting to program a
locked Protection Register causes a program error (SR[4] set) and a lock error (SR[1]
set).
If a program or erase operation occurs when programming a Protection Register,
certain restrictions may apply. See
page 65
Locking the Protection Registers
Each Protection Register can be locked by programming its respective lock bit in the
Lock Register. To lock a Protection Register, program the corresponding bit in the Lock
Register by issuing the Program Lock Register command, followed by the desired Lock
Register data (see
addresses of the Lock Registers are 0x80 for register 0 and 0x89 for register 1. These
addresses are used when programming the lock registers (see
Identifier Information” on page
Bit 0 of Lock Register 0 is already programmed at the factory, locking the lower, pre-
programmed 64-bit region of the first 128-bit Protection Register containing the unique
identification number of the device. Bit 1 of Lock Register 0 can be programmed by the
user to lock the user-programmable, 64-bit region of the first 128-bit Protection
Register. The other bits in Lock Register 0 are not used.
Lock Register 1 controls the locking of the upper sixteen 128-bit Protection Registers.
Each of the 16 bits of Lock Register 1 correspond to each of the upper sixteen 128-bit
Protection Registers. Programming a bit in Lock Register 1 locks the corresponding
128-bit Protection Register.
After being locked, the Protection Registers cannot be unlocked.
83). Issuing the Program Protection Register command outside of the Protection
®
Wireless Memory (L18 AD-Mux)
for details.
Section 9.2, “Device Commands” on page
Section 9.2, “Device Commands” on page
Figure 38, “Protection Register Programming Flowchart” on
67).
Table 25, “Simultaneous Operation Restrictions” on
60).
37). The physical
Table 27, “Device
37). Next, write the
Datasheet
61
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