PF38F5070M0Y0T0 NUMONYX [Numonyx B.V], PF38F5070M0Y0T0 Datasheet - Page 48
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PF38F5070M0Y0T0
Manufacturer Part Number
PF38F5070M0Y0T0
Description
Numonyx StrataFlash Wireless Memory
Manufacturer
NUMONYX [Numonyx B.V]
Datasheet
1.PF38F5070M0Y0T0.pdf
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10.3.8
10.3.9
Datasheet
48
Burst Wrap
The Burst Wrap (BW) bit determines whether 4-word, 8-word, or 16-word burst length
accesses wrap within the selected word-length boundaries or cross over to the next
burst-length segment. When BW is set, burst wrapping does not occur (default). When
BW is cleared, burst wrapping occurs.
When performing synchronous burst reads with BW set (no wrap), an output delay may
occur when the burst sequence crosses its first device-row (16-word) boundary. If the
burst sequence’s start address is 4-word aligned, then no delay occurs. If the start
address is at the end of a 4-word boundary, the worst case output delay is one clock
cycle less than the first access Latency Count. This delay can take place only once, and
doesn’t occur if the burst sequence does not cross a device-row boundary. WAIT
informs the system of this delay when it occurs.
Burst Length
The Burst Length bit (BL[2:0]) selects the linear burst length for all synchronous burst
reads of the flash memory array. The burst lengths are 4-word, 8-word, 16-word, and
continuous word.
Continuous-burst accesses are linear only, and do not wrap within any word length
boundaries (see
cycle begins, the device outputs synchronous burst data until it reaches the end of the
“burstable” address space.
Table 23, “Burst Sequence Word Ordering” on page
Numonyx™ StrataFlash
®
Wireless Memory (L18 AD-Mux)
Order Number: 313295-04
47). When a burst
November 2007
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