PF38F5070M0Y0T0 NUMONYX [Numonyx B.V], PF38F5070M0Y0T0 Datasheet - Page 50
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PF38F5070M0Y0T0
Manufacturer Part Number
PF38F5070M0Y0T0
Description
Numonyx StrataFlash Wireless Memory
Manufacturer
NUMONYX [Numonyx B.V]
Datasheet
1.PF38F5070M0Y0T0.pdf
(98 pages)
11.1.1
Note:
11.2
Datasheet
50
Factory Word Programming
Factory word programming is similar to word programming in that it uses the same
commands and programming algorithms. However, factory word programming
enhances the programming performance with V
programming times during OEM manufacturing processes. Factory word programming
is not intended for extended use. See
for limitations when V
When V
driven by a logic signal, V
V
“Example VPP Supply Connections” on page 54
configurations.
Buffered Programming
The device features a 32-word buffer to enable optimum programming performance.
For buffered programming, data is first written to an on-chip write buffer. Then the
buffer data is programmed into the flash memory array in buffer-size increments. This
can improve system programming performance significantly over non-buffered
programming.
When the Buffered Programming Setup command is issued (see
Commands” on page
availability of the write buffer. SR[7] indicates buffer availability: if set, the buffer is
available; if cleared, the write buffer is not available. To retry, issue the Buffered
Programming Setup command again, and re-check SR[7]. When SR[7] is set, the
buffer is ready for loading. (see
On the next write, a word count is written to the device at the buffer address. This tells
the device how many data words will be written to the buffer, up to the maximum size
of the buffer.
On the next write, a device start address is given along with the first data to be written
to the flash memory array. Subsequent writes provide additional device addresses and
data. All data addresses must lie within the start address plus the word count.
Optimum programming performance and lower power usage are obtained by aligning
the starting address at the beginning of a 32-word boundary (A[4:0] = 0x00). Crossing
a 32-word boundary during programming will double the total programming time.
After the last data is written to the buffer, the Buffered Programming Confirm command
is issued to the original block address. The WSM begins to program buffer contents to
the flash memory array. If a command other than the Buffered Programming Confirm
command is written to the device, a command sequence error occurs and Status
Register bits SR[7,5,4] are set. If an error occurs while writing to the array, the device
stops programming, and Status Register bits SR[7,4] are set, indicating a programming
failure.
Reading from another partition is allowed while data is being programmed into the
array from the write buffer (see
page
Additional buffer writes can be initiated by issuing another Buffered Programming
Setup command and repeating the buffered program sequence. Buffered programming
may be performed with V
page 17
PP
= V
62).
PPH
PP
for limitations when operating the device with V
= V
, the device draws programming current from the V
PPL
, the device draws programming current from the V
37), Status Register information is updated and reflects the
PP
= V
PPL
PP
= V
PPH
must remain above V
.
PPL
Figure 33, “Buffer Program Flowchart” on page
Section 14.0, “Dual-Operation Considerations” on
or V
Numonyx™ StrataFlash
Section 5.2, “Operating Conditions” on page 17
PPH
(see
shows examples of device power supply
PP
Section 5.2, “Operating Conditions” on
PPL
= V
MIN to program the device. When
PPH
PP
. This can enable faster
®
= V
Wireless Memory (L18 AD-Mux)
PP
PPH
Section 9.2, “Device
supply.
).
Order Number: 313295-04
CC
supply. If V
Figure 19,
November 2007
78).
PP
is