A25L05P AMICC [AMIC Technology], A25L05P Datasheet - Page 17

• Manufacturer Part Number: A25L05P
• Description: 2Mbit / 1Mbit / 512Kbit, Low Voltage, Serial Flash Memory With 85MHz SPI Bus Interface
• Manufacturer: AMICC [AMIC Technology]

Read Data Bytes (READ)
The device is first selected by driving Chip Select (
The instruction code for the Read Data Bytes (READ)
instruction is followed by a 3-byte address (A23-A0), each bit
being latched-in during the rising edge of Serial Clock (C).
Then the memory contents, at that address, is shifted out on
Serial Data Output (DO), each bit being shifted out, at a
maximum frequency f
(C).
The instruction sequence is shown in Figure 8. The first byte
addressed can be at any location. The address is
automatically incremented to the next higher address after
each byte of data is shifted out. The whole memory can,
Figure 8. Read Data Bytes (READ) Instruction Sequence and Data-Out Sequence
(August, 2007, Version 1.0)
DIO
DO
C
S
Note: Address bits A23 to A18 are Don’t Care, for A25L20P.
R
, during the falling edge of Serial Clock
Address bits A23 to A17 are Don’t Care, for A25L10P.
Address bits A23 to A16 are Don’t Care, for A25L05P
0 1
High Impedance
2 3 4
Instruction
5 6 7
S
) Low.
MSB
23 22 21
8
9
24-Bit Address
16
10
therefore, be read with a single Read Data Bytes (READ)
instruction. When the highest address is reached, the
address counter rolls over to 000000h, allowing the read
sequence to be continued indefinitely.
The Read Data Bytes (READ) instruction is terminated by
driving Chip Select (
High at any time during data output. Any Read Data Bytes
(READ) instruction, while an Erase, Program or Write cycle is
in progress, is rejected without having any effects on the
cycle that is in progress.
A25L20P/A25L10P/A25L05P Series
3 2 1 0
28 29 30 31 32 33 34 35 36 37 38 39
MSB
7
S
6 5 4 3 2 1 0
) High. Chip Select (
AMIC Technology Corp.
Data Out 1
S
) can be driven
7
Data Out 2