A25L05P AMICC [AMIC Technology], A25L05P Datasheet - Page 13

• Manufacturer Part Number: A25L05P
• Description: 2Mbit / 1Mbit / 512Kbit, Low Voltage, Serial Flash Memory With 85MHz SPI Bus Interface
• Manufacturer: AMICC [AMIC Technology]

Write Enable (WREN)
The Write Enable (WREN) instruction (Figure 4.) sets the
Write Enable Latch (WEL) bit.
The Write Enable Latch (WEL) bit must be set prior to every
Page Program (PP), Sector Erase (SE), Bulk Erase (BE) and
Write Status Register (WRSR) instruction.
Figure 4. Write Enable (WREN) Instruction Sequence
Write Disable (WRDI)
The Write Disable (WRDI) instruction (Figure 5.) resets the
Write Enable Latch (WEL) bit.
The Write Disable (WRDI) instruction is entered by driving Chip
Select (
Chip The Write Enable Latch (WEL) bit is reset under the
following conditions:
Figure 5. Write Disable (WRDI) Instruction Sequence
(August, 2007, Version 1.0)
S
) Low, sending the instruction code, and then driving
DIO
DIO
DO
DO
C
S
C
S
High Impedance
0 1
High Impedance
0 1
2 3
2 3
Instruction
Instruction
12
The Write Enable (WREN) instruction is entered by driving
Chip Select (
driving Chip Select (
﹣
﹣ Write Disable (WRDI) instruction completion
﹣ Write Status Register (WRSR) instruction completion
﹣ Page Program (PP) instruction completion
﹣ Sector Erase (SE) instruction completion
﹣ Bulk Erase (BE) instruction completion
4 5
4 5
A25L20P/A25L10P/A25L05P Series
Power-up
6 7
6 7
S
) Low, sending the instruction code, and then
S
) High.
AMIC Technology Corp.