com90c66 Standard Microsystems Corp., com90c66 Datasheet - Page 50

• Manufacturer Part Number: com90c66
• Description: Arcnet Controller/transceiver With At Interface And On-chip Ram Corporation
• Manufacturer: Standard Microsystems Corp.

* For latched addresses, t1 and t2 do not apply. Please refer to Figure 21 for Latched Address
** 130nS minimum inactive time on consecutive memory reads from the COM90C66.
D0-D7
D0-D15
nTOPL
A0-A19
nSBHE
nMEMR
nTOPH,
nMEMCS16
(Unlatched)
nMEMCS16
(Latched)
BALE
t10
t11
t1
t2
t3
t4
t5
t6
t7
t8
t9
Mode.
or
Address, nSBHE Set Up to BALE Low*
Address, nSBHE Hold after BALE Low*
Address, nSBHE Set Up to nMEMR Low
nMEMR Low to Valid Data
nMEMR Low to nTOPH, nTOPL Low
A19-A17 to nMEMCS16 Low (Unlatched) (128K RAM Decode)
A19-A11, BALE High to nMEMCS16 Low (Latched) (2K RAM
Decode)
nMEMR High to nTOPH, nTOPL High
nMEMR High to Data High Impedance
nMEMR High to BALE High (Next Address)
Address, nSBHE Invalid to nMEMCS16 High (Unlatched)*
t7
t6
t1
t3
FIGURE 15 - READ RAM CYCLE
Parameter
VALID
t5
t2
50
t4
t11
VALID DATA
min
20
20
25
30
0
0
0
0
0
0
typ max units
t9
t10
t8
**
80
30
40
25
15
20
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS