com90c66 Standard Microsystems Corp., com90c66 Datasheet - Page 27

• Manufacturer Part Number: com90c66
• Description: Arcnet Controller/transceiver With At Interface And On-chip Ram Corporation
• Manufacturer: Standard Microsystems Corp.

BIT
BIT
BIT
7-0 Address 7-0
5-3
2-0 Address 10-8
7,
2
1
0
6
Wait State
I/O Access
Transmitter Off
(not used)
Auto Increment
BIT NAME
BIT NAME
BIT NAME
SYMBOL
WAIT
IO-
ACCESS
TXOFF
SYMBOL
A7-A0
SYMBOL
AUTO-
INC
A10-A8
Table 10 - Address Pointer High Register
Table 9 - Address Pointer Low Register
Table 8 - Configuration Register
This bit is used to select the type of cycle. A logic "1" on this
bit negates the IOCHRDY signal for approximately one or two
XTAL1 clocks, creating one wait state. A logic "0" selects
zero wait state arbitration to the buffer RAM and generates
the Zero Wait State signal. Refer to the wait State Details
section of this document for further information.
defaults to a logic "1" upon hardware reset.
A logic "1" on this bit configures the buffer RAM for sequential
I/O mapped accesses, while a logic "0" configures the buffer
RAM for memory mapped accesses. This bit defaults to a
logic "0" upon hardware reset.
A logic "1" on this bit disables the transmitter of the
COM90C66, while the receiver remains functional. A logic "0"
keeps the transmitter enabled.
diagnostic troubleshooting of the network or node. Refer to
the Improved Diagnostics section of this document for further
details. This bit defaults to a logic "0" upon hardware reset.
These bits hold the lower eight address bits which provide the
addresses to the on-chip RAM.
These bits are undefined.
This bit controls whether or not the address pointer will
increment automatically when the device is in I/O Mapping
Mode. A logic "1" on this bit will automatically increment the
pointer after each access.
function. Please refer to the Memory Vs. I/O section of this
document for further detail.
These bits hold the upper three address bits which provide
the addresses to the on-chip RAM.
27
DESCRIPTION
DESCRIPTION
DESCRIPTION
A logic "0" will disable this
This bit may be used in
This bit