s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 61

• Manufacturer Part Number: s3c72m9
• Description: The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
• Manufacturer: Samsung Semiconductor, Inc.

S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
Register ID
CLMOD - Clock Output Mode Control Register
Bit
Identifier
RESET Value
Read/Write
Bit Addressing
CLMOD.3
CLMOD.2
CLMOD.1 -.0
Register and bit IDs
used for bit addressing
R = Read-only
W = Write-only
R/W = Read/write
Type of addressing
that must be used to
address the bit
(1-bit, 4-bit, or 8-bit)
Enable/Disable Clock Output Control bit
Bit 2
Clock Source and Frequency Selection Control Bits
Register name
0
0
0
0
0
1
1
.3
W
3
0
4
Disable clock output at the CLO pin
Enable clock output at the CLO pin
Always logic zero
0
1
0
1
Figure 4-1. Register Description Format
Select CPU clock souce fx/4, fx/8, fx/64 (1.05 MHz, 524kHz, or 65.5 kHz), or fxt/4
Select system clock fxx/8 (524 kHz at 4.19 MHz)
Select system clock fxx/16 (262 kHz at 4.19 MHz)
Select system clock fxx/64 (65.5 kHz at 4.19 MHz)
W
.2
2
0
4
Name of individual
bit or related bits
W
.1
1
0
4
Description of the
effect of specific
bit settings
W
.0
0
0
4
Bit value immediately
after a RESET
Associated
hardware module
CPU
Bit identifier used
for bit addressing
Bit number in
MSB to LSB order
Register location
in RAM bank 15
FD0H
MEMORY MAP
4-7