s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 209
s3c72m9
Manufacturer Part Number
s3c72m9
Description
The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.S3C72M9.pdf
(382 pages)
- Current page: 209 of 382
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S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
CLOCK OUTPUT MODE REGISTERS (CLMOD1, CLMOD2)
The clock output circuit is used to output clock pulses to the CLO1 and CLO2 pins. The clock output mode registers
(CLMOD1, CLMOD2) are used to enable or disable clock output to the CLO1/CLO2 pins and to select the CPU
clock source and frequency.
To output a frequency, set to clock output pins CLO1/P2.2 and CLO2/P2.3 to output mode and clear the pins' latch.
NOTE:
CLMOD1.1
CLMOD1 Bit Settings
0
0
1
1
Frequencies assume that fx is 4.19 MHz and fxt is 32.768 kHz.
CLMOD1.3
0
1
CLMOD1.0
Table 6-6. Clock Output Mode 1 Register (CLMOD1) Organization
0
1
0
1
Clock output is disabled (CLO1, CLO2)
Clock output is enabled (CLO1, CLO2)
CPU clock (fx/4, fx/8, fx/64, fxt/4)
Clock Source
fxx/16
fxx/64
fxx/8
Result of CLMOD1.3 Setting
Resulting Clock Output
1.05 MHz, 524 kHz, 65.5 kHz, 8.2 kHz
Frequency
65.5 kHz
524 kHz
262 kHz
OSCILLATOR CIRCUITS
6-9
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