s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 245
![no-image](/images/no-image-200.jpg)
s3c72m9
Manufacturer Part Number
s3c72m9
Description
The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.S3C72M9.pdf
(382 pages)
- Current page: 245 of 382
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S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
PORT 2 CIRCUIT DIAGRAM
NOTE:
P2.1/LCDFR
P2.2/CLO1
P2.3/CLO2
P2.0/M
PUR2
When a port pin serves as an output, its pull-up resistor is automatically disabled, even though
the port's pull-up resistor is enabled by bit settings in the pull-up resistor mode register (PUMOD).
Figure 10-3. Port 2 Circuit Diagram
V
DD
CMOS Push-Pull,
Open-Drain
N-Channel
CLO2
CLO1
LCDFR
PNE2.4
M
PNE2.5
PNE2.6
Output
Latch
MUX
PNE2.7
PM2.3
PM2.2
PM2.1
PM2.0
1, 4, 8
1, 4, 8
I/O PORTS
10-7
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