s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 262
s3c72m9
Manufacturer Part Number
s3c72m9
Description
The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.S3C72M9.pdf
(382 pages)
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TIMERS and TIMER/COUNTERS
TC0 EVENT COUNTER FUNCTION
Timer/counter 0 can monitor or detect system 'events' by using the external clock input at the TCL0 pin as the
counter source. The TC0 mode register selects rising or falling edge detection for incoming clock signals. The
counter register TCNT0 is incremented each time the selected state transition of the external clock signal occurs.
With the exception of the different TMOD0.4–TMOD0.6 settings, the operation sequence for TC0's event counter
function is identical to its programmable timer/counter function. To activate the TC0 event counter function,
— Set TMOD0.2 to "1" to enable TC0;
— Clear TMOD0.6 to "0" to select the external clock source at the TCL0 pin;
— Select TCL0 edge detection for rising or falling signal edges by loading the appropriate values to TMOD0.5 and
— P3.2 must be set to input mode.
11-14
TMOD0.4.
TMOD0.5
0
0
Table 11-5. TMOD0 Settings for TCL0 Edge Detection
TMOD0.4
0
1
TCL0 Edge Detection
S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
Falling edges
Rising edges
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