s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 42
s3c72m9
Manufacturer Part Number
s3c72m9
Description
The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.S3C72M9.pdf
(382 pages)
- Current page: 42 of 382
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ADDRESSING MODES
3-2
EFFH
0FFH
nFFH
E00H
FFFH
01FH
07FH
F80H
000H
020H
080H
n00H
RAM
Areas
NOTES:
1. 'X' means don't care.
2. Blank columns indicate RAM areas that are not addressable, given the addressing method and
3. 'n' means 1, 2, 3, ......, 13.
and Stack)
(Peripheral
enable memory bank (EMB) flag setting shown in the column headers.
Registers)
Registers)
Registers)
Registers
Registers
Hardware
(General
(General
Working
Bank 14
(Display
Bank 15
Bank 0
Bank n
Addressing
Mode
EMB = 0
Figure 3-1. RAM Address Structure
DA.b
DA
SMB = 14
SMB = 15
EMB = 1
SMB = 0
SMB = n
EMB = 0
@H+DA.b
@HL
S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
SMB = 15
SMB = 14
EMB = 1
SMB = 0
SMB = n
@WX
@WL
FBFH
FC0H
X
FB0H
FF0H
mema.b
X
memb.@L
X
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