s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 156

• Manufacturer Part Number: s3c72m9
• Description: The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
• Manufacturer: Samsung Semiconductor, Inc.

SAM47 INSTRUCTION SET
EI —
EI
Operation:
Description:
Example:
5-52
Enable Interrupts
Bit 3 of the interrupt priority register IPR (IME) is set to logic one. This allows all interrupts to be
serviced when they occur, assuming they are enabled. If an interrupt's status latch was previously
enabled by an interrupt, this interrupt can also be serviced.
If the IME bit (bit 3 of the IPR) is logic zero (e.g., all instructions are disabled), the instruction
EI
sets the IME bit to logic one, enabling all interrupts.
Operand
Operand
–
–
1
1
1
0
1
1
Binary Code
Operation Summary
1
1
Enable all interrupts
1
0
1
0
S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
1
1
1
0
IME
1
Operation Notation
Bytes
2
Cycles
2