SC2200 NSC [National Semiconductor], SC2200 Datasheet - Page 59
SC2200
Manufacturer Part Number
SC2200
Description
Thin Client On a Chip
Manufacturer
NSC [National Semiconductor]
Datasheet
1.SC2200.pdf
(433 pages)
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Revision 3.0
Signal Definitions
2.4.2
2.4.3
2.4.4
Signal Name
SDCLK_OUT
Signal Name
VPD7
VPD6
VPD5
VPD4
VPD3
VPD2
VPD1
VPD0
VPCKIN
Signal Name
DDC_SCL
DDC_SDA
HSYNC
VSYNC
VREF
Memory Interface Signals (Continued)
Video Port Interface Signals
CRT/TFT Interface Signals
EBGA
EBGA
EBGA
AH28
AH8
AK8
AH9
AH7
AL6
AL7
A20
C20
AJ6
AJ7
AJ8
P1
J1
J2
(Continued)
Ball No.
Ball No.
Ball No.
TEPBGA
TEPBGA
TEPBGA
AK28
G31
H28
H29
H30
H31
D16
F31
A11
B11
J28
J29
J30
Y1
Y2
Type
Type
Type
I/O
I/O
O
O
O
O
I
I
Description
SDRAM Clock Output. This output is routed
back to SDCLK_IN. The board designer
should vary the length of the board trace to
control skew between SDCLK_IN and
SDCLK.
Description
Video Port Data. The data is input from the
CCIR-656 video decoder.
Video Port Clock Input. The clock input
from the video decoder.
Description
DDC Serial Clock. This is the serial clock for
the VESA Display Data Channel interface. It
is used for monitor communications. The
DDC2B standard is supported by this inter-
face.
DDC Serial Data. This is the bidirectional
serial data signal for the VESA Display Data
Channel interface. It is used for monitor com-
munications. The DDC2B standard is sup-
ported by this interface.
Horizontal Sync
Vertical Sync
Voltage Reference. Reference voltage for
CRT PLL and DAC. This signal reflects the
internal voltage reference. If internal voltage
reference is used (recommended), leave this
ball disconnected. If an external voltage ref-
erence is used, this input is tied to a 1.235V
reference.
59
IDE_DATA10
IDE_DATA9
www.national.com
Mux
Mux
Mux
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