m28529-12 Mindspeed Technologies, m28529-12 Datasheet - Page 65
m28529-12
Manufacturer Part Number
m28529-12
Description
Inverse Multiplexing For Atm Ima Family
Manufacturer
Mindspeed Technologies
Datasheet
1.M28529-12.pdf
(309 pages)
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Table 1-11.
28529-DSH-001-K
atmURxData[0]
atmURxData[1]
atmURxData[2]
atmURxData[3]
atmURxData[4]
atmURxData[5]
atmURxData[6]
atmURxData[7]
atmURxData[8]
atmURxData[9]
atmURxData[10]
atmURxData[11]
atmURxData[12]
atmURxData[13]
atmURxData[14]
atmURxData[15]
atmURxPrty
atmURxAddr[0]
atmURxAddr[1]
atmURxAddr[2]
atmURxAddr[3]
atmURxAddr[4]
Pin Label
M2852x Pin Descriptions (10 of 18)
ATM UTOPIA Receive
Data
ATM UTOPIA Receive
Parity
ATM UTOPIA Receive
Address
Signal Name
Mindspeed Proprietary and Confidential
Mindspeed Technologies
D24
No.
C20
B21
A22
D20
C21
B22
A23
A24
D21
C22
B23
B24
C23
D22
B25
A26
D19
E23
C25
B26
E24
O/TS
O/TS
I/O
I
Receive direction ATM side cell data.
Parity status signal. In 8 bit UTOPIA mode, a parity calculation is
performed over atmURxData[7:0] for each clock cycle of
atmUTxClk. Odd parity is used. In 16 bit UTOPIA mode, this signal
is the parity of atmURxData[15:0]. This signal is optional.
Receive ATM Cell Bus address. This address determines the source
channel of the Receive ATM cells output from the IMA subsystem
and also selects the channel sourcing the atmURxClAv signal.
®
Description
Functional Description
50
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