m28529-12 Mindspeed Technologies, m28529-12 Datasheet - Page 232

• Manufacturer Part Number: m28529-12
• Description: Inverse Multiplexing For Atm Ima Family
• Manufacturer: Mindspeed Technologies

2.5.18
This register contains the most significant bits of a 16 bit count of the number of ATM layer cells transmitted over
the Transmit ATM side UTOPIA bus for a particular UTOPIA address. The register is read only.
Tx UTOPIA Address 0 - 15
Tx UTOPIA Address 16–31
28529-DSH-001-K
0xC41
0x841
n=16
n=0
Bit
7-0
0xC43
0x843
n=17
n=1
Default
0
0xC45
0x845
n=18
n=2
IMA_TX_ATMn_CELL_COUNT_MSB (Transmit Cell Count MSBs)
Transmit Cell Count MSBs
0xC47
0x847
n=19
n=3
0x941
n=20
0xCC
n=4
Name
1
0x943
Mindspeed Proprietary and Confidential
n=21
0xCC
Mindspeed Technologies
n=5
3
0x945
n=22
0xCC
n=6
5
Transmit Cell Count: This field contains the most significant bits of a 16 bit count of the
number of ATM layer cells transmitted over the specific UTOPIA address. A write
operation with data = 0x01 to the first address (0x840 for Address 0, 0x842 for Address
1, etc.) transfers the state of all 16 bits of the counter to registers that are accessible to
the microprocessor bus and clears the counter. A read operation should then be
performed to read the previous state of the counter. The first address should be read
first. The second address (0x841 for Address 0, 0x843 for Address 1, etc.) is read next. A
write operation with data = 0x00 to the first address of each group returns back to the
raw counters.
M28525 -- Not Applicable
0x947
n=23
0xCC
n=7
7
M28529
M28525
M28529
0xA41
n=24
0xD4
n=8
1
0xA43
n=25
0xD4
n=9
®
3
0xA45
n=26
n=10
0xD4
5
Description
0xA47
n=27
n=11
0xD4
7
0xB41
n=28
n=12
0xDC
1
0xB43
n=29
n=13
0xDC
3
0xB45
n=30
n=14
0xDC
Registers
5
0xB47
n=31
n=15
0xDC
7
217