ort82g5 Lattice Semiconductor Corp., ort82g5 Datasheet - Page 41

• Manufacturer Part Number: ort82g5
• Description: Xaui And Fc Fpscs
• Manufacturer: Lattice Semiconductor Corp.

Lattice Semiconductor
Figure 20. Receive Clocking for a Single Block (Similar Connections Would Be Used for Block B)
The receive channel alignment bypass mode allows mixing of half and full line rates among the channels, as shown
in Figure 21. The figure shows channel AC configured in full rate mode at 2.0 Gbps. Channel AD configured in half-
rate mode at 1.0 Gbps. The receive alignment FIFO per channel cannot be used in this mode.
Figure 21. Receive Clocking for Mixed Line Rates
Each SERDES block can also be configured for any line rate (0.6 to 3.7 Gbps), since each block has its own refer-
ence clock input pins.
Multi-Channel Alignment Clocking Strategies for the ORT42G5
The data on the four channels in the ORT42G5 can be independent of each other or can be synchronized in two
different ways. For example, two channels within a SERDES block can be aligned together, channel C and channel
D. Alternatively, all four channels in a SERDES block can be aligned together to form a communication channel
with a bandwidth of 10 Gbps. Individual channels within an alignment group can be disabled (i.e., powered down)
without disrupting other channels. Clocking strategies for these various modes are described in the following para-
graphs.
For dual alignment both channels must be sourced by the same clock. Either RWCKAC or RWCKAD can be con-
nected to RSYS_CLK_A2. A clocking example for dual alignment is shown in Figure 22.
All Recovered
78.125 MHz
Clocks at
FPGA
Logic
FPGA
Logic
25 MHz
or 50 MHz
78.125 MHz
50 MHz
25 MHz
RSYS_CLK_A2
RSYS_CLK_A2
RWCKAC
RWCKAD
RCK78A
RWCKAD
RWCKAC
RCK78A
Common Logic, Block A
Common Logic, Block A
Channel AC
Channel AD
Channel AC
Channel AD
41
ORCA ORT42G5 and ORT82G5 Data Sheet
2
2
REFCLK[P:N]_A
156.25 MHz
REFCLK[P:N]_A
100 MHz
Incoming Serial Data
1.0 Gbps (Half-Rate)
Incoming Serial Data
2.0 Gbps (Full-Rate)
and One Channel of
Two Channels of
One Channel of
3.125 Gbps