emc643sp16ak Emlsi Inc., emc643sp16ak Datasheet - Page 34

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emc643sp16ak

Manufacturer Part Number
emc643sp16ak
Description
4mx16 Bit Cellularram Ad-mux
Manufacturer
Emlsi Inc.
Datasheet
Table 15: Asynchronous WRITE Cycle Timing Requirements
Note:
1. The High-Z timings measure a 100mV transition from either V
2. WE# Low time must be limited to t
Address and ADV# LOW setup time to WE# LOW
Address HOLD from ADV# going HIGH
Address setup to ADV# going HIGH
Address valid to end of WRITE
LB#/UB# select to end of WRITE
CE# HIGH between subsequent async operations
CE# LOW to ADV# HIGH
Chip enable to end of WRITE
Data HOLD from WRITE time
Data WRITE setup time
Chip disable to WAIT High-Z output
ADV# pulse width
ADV# setup to end of WRITE
Write to DQ High-Z output
WRITE pulse width
Parameter
CEM
(4µs).
OH
or V
Symbol
t
t
t
t
t
t
t
t
t
WHZ
t
t
AVH
CPH
CVS
t
t
t
t
AVS
AW
BW
CW
DW
WP
DH
OL
AS
HZ
VP
VS
toward VccQ/2.
34
Min
70
70
70
20
70
45
0
2
5
5
7
0
5
4Mx16 CellularRAM AD-MUX
Max
7
7
EMC643SP16AK
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
1
1
2

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