emc643sp16ak Emlsi Inc., emc643sp16ak Datasheet - Page 28

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emc643sp16ak

Manufacturer Part Number
emc643sp16ak
Description
4mx16 Bit Cellularram Ad-mux
Manufacturer
Emlsi Inc.
Datasheet
Operating Mode (BCR[15]) Default = Asynchronous Operation
The operating mode bit selects either synchronous burst operation or the default asynchronous mode of operation.
REFRESH CONFIGURATION REGISTER
The refresh configuration register (RCR) defines how the CellularRAM device performs its transparent self refresh. Altering the refresh
parameters can dramatically reduce current consumption during standby mode. Figure 19 describes the control bits used in the RCR. At
power-up, the RCR is set to 0010h. The RCR is accessed with CRE HIGH and A[19:18] = 00b; or through the register access software
sequence with A/DQ = 0000h on the third cycle.
Figure 19: Refresh Configuration Register Mapping
Note: 1. Reserved bits must be set to zero. Reserved bits not set to zero will affect device functionality. RCR[15:0] will be read back as written.
All must be set to “0”
RCR[19]
A[21:20]
Reserved
21~20
0
1
0
RCR[18]
Register Select
A[19:18]
0
0
1
19-18
All must be set to “0”
Register Select
Select DIDR
Select RCR
Select BCR
A[17:16]
Reserved
17-16
Reserved
[15:7]
A/DQ
15~7
A/DQ
6
6
Setting is ignored
(Default 001b)
Ignored
A/DQ
28
5
5
A/DQ
4
4
Must be set to “0”
RCR[2]
0
0
0
0
1
1
1
1
Reserved
A/DQ
3
3
4Mx16 CellularRAM AD-MUX
RCR[1]
0
0
1
1
0
0
1
1
EMC643SP16AK
A/DQ
2
2
RCR[0]
0
1
0
1
0
1
0
1
A/DQ
PAR
1
1
Refresh Coverage
Full array (default)
Bottom 1/4 array
Bottom 1/8 array
Bottom 1/2 array
None of array
Top 1/2 array
Top 1/4 array
Top 1/8 array
A/DQ
0
0

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