emc643sp16ak Emlsi Inc., emc643sp16ak Datasheet - Page 32

• Manufacturer Part Number: emc643sp16ak
• Description: 4mx16 Bit Cellularram Ad-mux
• Manufacturer: Emlsi Inc.

TIMING REQUIREMENTS
Table 13: Asynchronous READ Cycle Timing Requirements
All tests performed with outputs configured for default setting of half drive strength, (BCR[5:4] = 01b).
Note:
1. The High-Z timings measure a 100mV transition from either V
2. The Low-Z timings measure a 100mV transition away from the High-Z (VccQ/2) level toward either V
Address access time
ADV# access time
Address hold from ADV# HIGH
Address setup to ADV# HIGH
LB#/UB# access time
LB#/UB# disable to DQ High-Z output
Chip select access time
CE# LOW to ADV# HIGH
Chip disable to DQ and WAIT High-Z output
Output enable to valid output
OE# LOW to WAIT valid
Output disable to DQ High-Z output
Output enable to Low-Z output
ADV# pulse width
Parameter
Symbol
OH
t
t
AADV
t
t
t
t
t
t
OEW
t
CVS
t
OHZ
t
AVH
AVS
t
BHZ
t
OLZ
t
CO
OE
AA
BA
HZ
VP
or V
OL
toward VccQ/2.
32
Min
2
5
7
1
3
5
OH
or V
OL
.
4Mx16 CellularRAM AD-MUX
Max
7.5
70
70
70
70
20
7
7
7
EMC643SP16AK
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
1
1
1
2