w83c554f Winbond Electronics Corp America, w83c554f Datasheet - Page 38

• Manufacturer Part Number: w83c554f
• Description: System I/o Controller With Pci Arbiter & Ultradma/33 Ide Controller
• Manufacturer: Winbond Electronics Corp America

W83C554F
System Architecture
3.9
PCI Configuration Write Cycle
The Configuration Write command (C/BE[3:0]# = Bh during address phase) is used in slave mode to write to the
configuration registers. 8-bit, 16-bit, 24-bit and 32-bit accesses are supported when the IDSEL is asserted and AD[1:0] are
00. The PCI controller will respond to all Configuration write cycles, even for bytes not used. During the PCI address phase
AD[7:2] define the DWORD accessed, while the byte enables (C/BE[3:0]#) address the byte(s) within each DWORD.
Refer to Figure 3-5. The Slave Configuration Write command cycle is used by the host processor to write the PCI
configuration space in the W83C554F. This permits the processor to control basic W83C554F activity, such as
enable/disable, change I/O location, etc. It is a single, non-burst, 8, 16 or 32-bit transfer, of fixed duration, i.e. the
W83C554F will assert TRDY# on the 4th bus cycle of the transfer.
Figure 3-5. Slave Configuration Write
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