s71ws512ne0bfwzz Meet Spansion Inc., s71ws512ne0bfwzz Datasheet - Page 27

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s71ws512ne0bfwzz

Manufacturer Part Number
s71ws512ne0bfwzz
Description
Stacked Multi-chip Product Mcp Flash Memoy And Psram Cmos 1.8 Volt, Simultaneous Operation, Burst Mode Flash Memory And Pseudo-static Ram
Manufacturer
Meet Spansion Inc.
Datasheet
A d v a n c e
I n f o r m a t i o n
pass mode, the full 3-cycle RESET command sequence must be used to
reset the device. Removing V
from the ACC input, upon completion of the
HH
embedded program or erase operation, returns the device to normal operation.
Note that sectors must be unlocked prior to raising ACC to V
. Note that the ACC
HH
pin must not be at V
for operations other than accelerated programming and
HH
accelerated chip erase, or device damage may result. In addition, the ACC pin
must not be left floating or unconnected; inconsistent behavior of the device may
result.
When at V
, ACC locks all sectors. ACC should be at V
for all other conditions.
IL
IH
Write Buffer Programming Operation
Write Buffer Programming allows the system to write a maximum of 32 words
in one programming operation. This results in a faster effective word program-
ming time than the standard “word” programming algorithms. The Write Buffer
Programming command sequence is initiated by first writing two unlock cycles.
This is followed by a third write cycle containing the Write Buffer Load command
written at the Sector Address in which programming will occur. At this point, the
system writes the number of “word locations minus 1” that will be loaded into
the page buffer at the Sector Address in which programming will occur. This tells
the device how many write buffer addresses will be loaded with data and there-
fore when to expect the “Program Buffer to Flash” confirm command. The number
of locations to program cannot exceed the size of the write buffer or the operation
will abort. (NOTE: the size of the write buffer is dependent upon which data are
being loaded. Also note that the number loaded = the number of locations to pro-
gram minus 1. For example, if the system will program 6 address locations, then
05h should be written to the device.)
The system then writes the starting address/data combination. This starting ad-
dress is the first address/data pair to be programmed, and selects the “write-
buffer-page” address. All subsequent address/data pairs must fall within the “se-
lected-write-buffer-page”.
The “write-buffer-page” is selected by using the addresses A
- A5 where A
MAX
MAX
is A23 for WS256N.
The “write-buffer-page” addresses must be the same for all address/data
pairs loaded into the write buffer. (This means Write Buffer Programming
cannot be performed across multiple “write-buffer-pages”. This also means that
Write Buffer Programming cannot be performed across multiple sectors. If the
system attempts to load programming data outside of the selected “write-buffer-
page”, the operation will ABORT.)
After writing the Starting Address/Data pair, the system then writes the remain-
ing address/data pairs into the write buffer. Write buffer locations may be loaded
in any order.
Note that if a Write Buffer address location is loaded multiple times, the “address/
data pair” counter will be decremented for every data load operation. Also,
the last data loaded at a location before the “Program Buffer to Flash” confirm
command will be programmed into the device. It is the software’s responsibility
to comprehend ramifications of loading a write-buffer location more than once.
The counter decrements for each data load operation, NOT for each unique
write-buffer-address location.
Once the specified number of write buffer locations have been loaded, the system
must then write the “Program Buffer to Flash” command at the Sector Address.
June 28, 2004 S71WS512NE0BFWZZ_00_A1
S29WSxxxN MirrorBit™ Flash Family For Multi-chip Products (MCP)
27

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