80ksbr200 Integrated Device Technology, 80ksbr200 Datasheet - Page 97

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80ksbr200

Manufacturer Part Number
80ksbr200
Description
Srio Serial Buffer Flow-control Device
Manufacturer
Integrated Device Technology
Datasheet
„2005 Integrated Device Technology, Inc. All rights reserved. Advanced Datasheet for informational purposes only. Product specifications subject to change without notice.NOT AN OFFER FOR SALE The information presented herein is subject to a
Non-Disclosure Agreement (NDA) and is for planning purposes only. Nothing contained in this presentation, whether verbal or written, is intended as, or shall have the effect of, a sale or an offer for sale that creates a contractual power of acceptance.
IDT 80KSBR200
Notes
8.2.13 Missing Packet Detection Registers
Increment and Memory Stop Address registers and are fully described in the section on Missing Packet Detection and
Replacement.
Memory Start Address Register
Current Memory Address Register
Note:
Name:
Missing Packet Detection mechanism consists of Memory Start Address, Current Memory Address, Memory Address
Bit
29
31:30
Bit
30:0
31
9:0)
14:10)
15)
23:16)
27:24)
28)
29)
31:30)
MEM_STRT_ADDR
Field Name
FLAG_WRAP_STP
FRAME_CNT
Field Name
MEM_STRT_ADDR
-
FRAME SIZE - The maximum frame size of the data for the TI application. Whenever the FRAME SIZE
has been hit, a doorbell will be issued to wake up the DSP (if doorbell is enabled).
FRAME OFFSET - TI requested that we have an offset to the first FRAME SIZE to allow them to
compensate for delays through the system.
DOORBELL - This bit indicates that the FRAME SIZE is active and the doorbell should be sent when
FRAME SIZE is hit.
FRAME COUNT - The location for the current value of the counter for FRAME SIZE. When the count
reaches FRAME SIZE and the doorbell is active, the doorbell will be sent and FRAME COUNT will reset
to zero.
Lite Dest ID - Lite protocols have only four bits to select either a destination ID or Case Scenario. To solve
the problem of what happens when a Lite protocol selects a case scenario and then the packet needs to
be loaded into a queue, the Lite Dest ID is placed in the case scenario. The queue inputs may be
programmed to allow selection of multiple queues with the same destination ID.
Memory Wrap or Stop - Defines whether the NEXT ADDRESS will wrap or stop when it hits STOP
ADDRESS. 0 = WRAP, 1 = STOP.
Memory Doorbell - Indicates whether a doorbell should be sent when the NEXT ADDRESS hits the
STOP ADDRESS.
Frame size plus offset should not exceed ten bits.
Type
RW
RO
Type
RW
Table 69 Missing Packet Start Address Register
97 of 172
Table 68 Case Scenario Frame Register
Address:
Reset
Value
1b0
2b0
Reset
Value
31h0
0
0x18580
Comment
Set Flag on Wrap or Stop:
Used with either stop or wrap
The highest two bits of the frame count
Comment
Memory Start Address:
Start address for missing packet detection
Reserved
Advanced Datasheet*
March 19, 2007

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