80ksbr200 Integrated Device Technology, 80ksbr200 Datasheet - Page 85

• Manufacturer Part Number: 80ksbr200
• Description: Srio Serial Buffer Flow-control Device
• Manufacturer: Integrated Device Technology

„2005 Integrated Device Technology, Inc. All rights reserved. Advanced Datasheet for informational purposes only. Product specifications subject to change without notice.NOT AN OFFER FOR SALE The information presented herein is subject to a
Non-Disclosure Agreement (NDA) and is for planning purposes only. Nothing contained in this presentation, whether verbal or written, is intended as, or shall have the effect of, a sale or an offer for sale that creates a contractual power of acceptance.
IDT 80KSBR200
Notes
Port 0 Packet/Control Symbol Capture 0 CSR
Undefined results will occur if this register is written while actual physical layer errors are being detected by the port. Also,
there could be latency between asserting an interrupt from Output-Degraded Encountered or Output-Failed Encountered
to loading this register, such that the interrupt is asserted a few cycles before the error is captured into this register.
Note:
Note:
Name:
Name:
This register contains the first 4 bytes of captured packet symbol information or a control character and control symbol.
0
7:1
23:8
28:24
29
31:30
31:0
Bit
Bit
1.
1.
P0_ATTR_CAP_CSR
P0_PKT_CAP_0_CSR
The above register is described in the RIO Specification Part 8, sec. 2.3.2.12
The above register is described in the RIO Specification Part 8, sec. 2.3.2.13
CAP_VALID_INFO
-
EXT_CAPT_INFO
ERR_TYPE
-
INFO_TYPE
CAPT_0
Field Name
Field Name
Table 45 Port 0 Packet/Control Symbol Capture 0 CSR
1b0
0
0x0000
0x0
0
2b00
All 0s
Reset
Value
Reset
Value
85 of 172
Address:
Address:
Table 44 Port 0 Attribute Capture CSR
Capture Valid Info:
This bit is set by hardware to indicate that the Packet/control symbol
capture registers contain valid information. For control symbols, only
capture register 0 will contain meaningful information.
Reserved.
Extended Capture Information[0:15]:
ECI contains the control/data character signal corresponding to each
byte of captured data.
ECI[0] = bit associated with P0PSC0CSR[0:7]
ECI[1] = bit associated with P0PSC0CSR[8:15]
ECI[2] = bit associated with P0PSC0CSR[16:23]
ECI[3] = bit associated with P0PSC0CSR[24:31]
ECI[4] = bit associated with P0PSC1CSR[0:7]
ECI[5] = bit associated with P0PSC1CSR[8:15]
...
ECI[14] = bit associated with P0PSC3CSR[16:23]
ECI[15] = bit associated with P0PSC3CSR[24:31]
Error Type:
The encoded value of the bit in the Port 0 Error Detect CSR that
describes the error captured in the Port 0 Error Capture CSRs.
Reserved.
Info Type, type of information logged:
2b00 - packet
2b01 - control symbol (only error capture register 0 is valid)
2b10 - implementation specific
2b11 - undefined.
Capture 0: Control character and control symbol or Bytes 0 to 3 of
Packet Header.
0x000648
0x00064C
Comment
Comment
Advanced Datasheet*
March 19, 2007