am79c961a Advanced Micro Devices, am79c961a Datasheet - Page 62

• Manufacturer Part Number: am79c961a
• Description: Pcnet?-isa Ii Jumperless, Full Duplex Single-chip Ethernet Controller For Isa
• Manufacturer: Advanced Micro Devices

BP_CS
FL_SEL
Checksum Failure
After RESET, the PCnet-ISA II controller begins
reading the EEPROM and storing the information in
registers inside PCnet-ISA II controller. PCnet-ISA II
controller does a checksum on word locations 0-1Bh
inclusive and if the byte checksum = FFh, then the
data read from the EEPROM is considered good. If
the checksum is not equal to FFh, then the PC-
net-ISA II controller enters what is called software re-
locatable mode.
In software relocatable mode, the device functions the
same as in Plug and Play mode, except that it does not
62
bus. When APROM_EN is cleared,
default state, the IEEE address will
be read in from the serial device and
written to an internal RAM. When
the I/O space of the IEEE PROM is
selected, PCnet-ISA II, will access
the contents of this RAM for I/O read
cycles. I/O wr ite cycles will be
ignored.
Boot PROM Chip Select. When
BP_CS is set to one, BALE will act
as an external chip select (active
low) above bit 15 of the address bus.
BALE = 0, will select the boot PROM
when MEMR is asserted low if the
BP_CS bit is set and BPAM[2:0]
match SA[15:13] and BPSZ[3:0]
matches the selected size. When
BP_CS is set to zero. BALE will act
as the normal address latch strobe
to capture the upper address bits for
memory access to the boot PROM.
BP_CS is by default low. The pri-
mary purpose of this bit is to allow
non-ISA bus applications to support
larger Boot PROMS or non-standard
Boot PROM/Flash locations.
Flash Memory Device Selected.
W h e n s e t , t h e B o o t P RO M i s
replaced with an external Flash
memor y device. In Bus Master
M o d e, B P CS i s r e p l a c e d w i t h
F l a s h _ O E . I R Q 1 2 b e c o m e s
Flash_WE. The Flash’s CS pin is
grounded. In shared memory mode,
BPCS is replaced with Flash_CS.
IRQ12 becomes Static_RAM_CS
pin. The SROE and SRWE signals
are connected to both the SRAM
and Flash memory devices. FL_SEL
is cleared by a reset, which is the
default.
Am79C961A
respond to the same initiation key as Plug and Play
supports. Instead, a different key is used to bring PC-
net-ISA II controller out of the Wait For Key state. This
key is as follows:
6B, 35, 9A, CD, E6, F3, 79, BC
5E, AF, 57, 2B, 15, 8A, C5, E2
F1, F8, 7C, 3E, 9F, 4F, 27, 13
09, 84, 42, A1, D0, 68, 34, 1A
Use Without EEPROM
In some designs, especially PC motherboard applica-
t i o n s , i t m ay b e d e s i r a b l e t o e l i m i n a t e t h e
EEPROM altogether. This would save money, space,
and power consumption.
The operation of this mode is similar to when the PC-
net-ISA II controller encounters a checksum error, ex-
cept that to enter this mode the SHFBUSY pin is left
unconnected. The device will enter software relocat-
able mode, and the BIOS on the motherboard can
wake up the device, configure it, load the IEEE address
(possibly stored in Flash ROM) into the PCnet-ISA II
controller, and activate the device.
External Scan Chain
The External Scan Chain is a set of bits stored in the
EEPROM which are not used in the PCnet-ISA II con-
troller but which can be used with external hardware to
allow jumperless configuration of external devices.
A f t e r R E S E T, t h e P C n e t -I S A I I c o n t r o l l e r
begins reading the EEPROM and storing the informa-
t i o n i n r e g i s t e r s i n s i d e t h e P C n e t -I S A I I
controller. SHFBUSY is held high during the read of the
EEPROM. If external circuitry is added, such as a shift
register, which is clocked from SCLK and is attached to
DO from the EEPROM, data read out of the EEPROM
will be shifted into the shift register. After reading the
EEPROM to the end of the External Shift Chain, and if
there is a correct checksum, SHFBUSY will go low.
This will be used to latch the infor mation from
the EEPROM into the shift register. If the checksum is
invalid, SHFBUSY will not go low, indicating that the
EEPROM may be bad.
Flash PROM
Use
Instead of using a PROM or EPROM for the Boot
PROM, it may be desirable to use a Flash or EEPROM
type of device for storing the Boot code. This would
allow for in-system updates and changes to the infor-
mation in the Boot ROM without opening up the PC. It
may also be desirable to store statistics or drivers in the
Flash device.