zl50060gag2 Zarlink Semiconductor, zl50060gag2 Datasheet - Page 71

• Manufacturer Part Number: zl50060gag2
• Description: 16 K Channel Digital Switch With High Jitter Tolerance, Per Stream Rate Conversion 2, 4, 8, 16 Or 32 Mbps , 64 Input And 64 Output Streams Pin Compatible With Mt90869
• Manufacturer: Zarlink Semiconductor

14.10
14.10.1
Address 00C3
The Local BER Start Send Register defines the output channel and the stream on which the BER sequence starts
to be transmitted. The LBSSR register is configured differently for Non-32 Mbps and 32 Mbps Modes:
15:13
15:13
12:8
12:9
Bit
7:0
Bit
8:0
Local Bit Error Rate (BER) Registers
Local BER Start Send Register (LBSSR)
H
Table 34 - Local BER Start Send Register (LBSSR) Bits in Non-32 Mbps Mode
.
LBSCA[7:0]
LBSCA[8:0]
LBSSA[4:0]
LBSSA[3:0]
Table 35 - Local BER Start Send Register (LBSSR) Bits in 32 Mbps Mode
Reserved
Reserved
Name
Name
Reset
Reset
Value
Value
0
0
0
0
0
0
Reserved
Must be set to 0 for normal operation
Local BER Send Stream Address Bits
The binary value of these bits refers to the Local output stream
which carries the BER data.
Local BER Send Channel Address Bits
The binary value of these bits refers to the Local output channel at
which the BER data starts to be sent.
Reserved
Must be set to 0 for normal operation
Local BER Send Stream Address Bits
The binary value of these bits refers to the Local output stream
which carries the BER data.
Local BER Send Channel Address Bits
The binary value of these bits refers to the Local output channel at
which the BER data starts to be sent.
Zarlink Semiconductor Inc.
ZL50060/1
71
Description
Description
Data Sheet