zl50060gag2 Zarlink Semiconductor, zl50060gag2 Datasheet - Page 17
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zl50060gag2
Manufacturer Part Number
zl50060gag2
Description
16 K Channel Digital Switch With High Jitter Tolerance, Per Stream Rate Conversion 2, 4, 8, 16 Or 32 Mbps , 64 Input And 64 Output Streams Pin Compatible With Mt90869
Manufacturer
Zarlink Semiconductor
Datasheet
1.ZL50060GAG2.pdf
(99 pages)
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Pin Description (continued)
LSTo16-31
Pin Name
LCSTo0-3
J20, K17, K18
J17, J18, J19,
Coordinates
G18, G19,
G20, H18,
H19, H20,
C17, C16,
F20, G17,
F18, F19,
B16, A16
ZL50061
Package
(272-ball
PBGA)
J13, J14, J15,
Coordinates
G13, G14,
G15, G16,
H13, H14,
H15, H16,
A16, A15,
F13, F14,
F15, F16,
Package
(256-ball
A14, A13
ZL50060
PBGA)
J16
Zarlink Semiconductor Inc.
ZL50060/1
control of the output HIGH or high impedance state.
Local Output Channel high impedance Control (5 V
Tolerant Three-state Outputs). These pins control external
buffering individually for a set of Local output streams on a
per-channel basis.
When LOW, the external output buffer will be tri-stated.
When HIGH, the external output buffer will be enabled.
In Local Non-32 Mbps Mode (stream rate 2 Mbps to 16 Mbps):
LCSTo0 is the output enable for LSTo0,4,8,12,16,20,24,28
LCSTo1 is the output enable for LSTo1,5,9,13,17,21,25,29
LCSTo2 is the output enable for LSTo2,6,10,14,18,22,26,30
LCSTo3 is the output enable for LSTo3,7,11,15,19,23,27,31.
In Local 32 Mbps Mode (stream rate 32 Mbps):
LCSTo0 is the output enable for LSTo0,4,8,12
LCSTo1 is the output enable for LSTo1,5,9,13
LCSTo2 is the output enable for LSTo2,6,10,14
LCSTo3 is the output enable for LSTo3,7,11,15.
Refer to descriptions of the LORS and ODE pins for control of
Local Serial Output Streams 16 to 31 (5 V Tolerant
Three-state Outputs with Slew-Rate Control).
In Local Non-32 Mbps Mode, these pins output serial TDM
data streams at a data rate of:
16.384 Mbps (with 256 channels per stream),
8.192 Mbps (with 128 channels per stream),
4.096 Mbps (with 64 channels per stream) or
2.048 Mbps (with 32 channels per stream).
The data rate is independently programmable for each output
stream.
These pins are unused when the Local 32 Mbps Mode is
selected. Therefore, the value output on these pins during
Local 32 Mbps Mode (either driven-HIGH or high impedance)
is dependent on the configuration of the LORS pin.
Refer to the descriptions of the LORS and ODE pins for
the output LOW or active state.
17
Description
Data Sheet
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