zl50060gag2 Zarlink Semiconductor, zl50060gag2 Datasheet - Page 13
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zl50060gag2
Manufacturer Part Number
zl50060gag2
Description
16 K Channel Digital Switch With High Jitter Tolerance, Per Stream Rate Conversion 2, 4, 8, 16 Or 32 Mbps , 64 Input And 64 Output Streams Pin Compatible With Mt90869
Manufacturer
Zarlink Semiconductor
Datasheet
1.ZL50060GAG2.pdf
(99 pages)
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Pin Description (continued)
Backplane and Local Outputs and Control
Pin Name
LSTi16-31
LSTi0-15
ODE
Coordinates
W18, W19,
M18, M19,
M20, N18,
N19, N20,
U19, U20,
L20, M17,
P17, P19,
P20, R18,
T20, U18,
V17, V18,
V19, V20,
Y20, Y17,
R19, R20
T18, T19,
L18, L19,
Y18, Y19
ZL50061
Package
(272-ball
PBGA)
A12
Coordinates
M13, M14,
M15, M16,
N12, N13,
N16, P12,
R12, R13,
R14, R15,
K13, K14,
K15, K16,
P13, P14,
P15, P16,
R16, T12,
N14, N15
T13, T14,
Package
(256-ball
L13, L14,
L15, L16,
ZL50060
T15, T16
PBGA)
B10
Zarlink Semiconductor Inc.
ZL50060/1
Local Serial Input Streams 0 to 15 (5 V Tolerant Inputs
with Internal Pull-downs).
In Local Non-32 Mbps Mode, these pins accept serial TDM
data streams at a data rate of:
16.384 Mbps (with 256 channels per stream),
8.192 Mbps (with 128 channels per stream),
4.096 Mbps (with 64 channels per stream) or
2.048 Mbps (with 32 channels per stream).
The data rate is independently programmable for each input
stream.
In Local 32 Mbps Mode, these pins accept serial TDM data
streams at a fixed data rate of 32.768 Mbps (with 512
channels per stream).
Local Serial Input Streams 16 to 31 (5 V Tolerant Inputs
with Internal Pull-downs).
In Local Non-32 Mbps Mode, these pins accept serial TDM
data streams at a data rate of:
16.384 Mbps (with 256 channels per stream),
8.192 Mbps (with 128 channels per stream),
4.096 Mbps (with 64 channels per stream) or
2.048 Mbps (with 32 channels per stream).
The data rate is independently programmable for each input
stream.
In Local 32 Mbps Mode, these pins are unused and should be
externally connected to a defined logic level.
Output Drive Enable (5 V Tolerant Input with Internal
Pull-up).
An asynchronous input providing Output Enable control to the
BSTo0-31, LSTo0-31, BCSTo0-3, and LCSTo0-3 outputs.
When LOW, the BSTo0-31 and LSTo0-31 outputs are driven
HIGH or high impedance (dependent on the BORS and LORS
pin settings respectively) and the outputs BCSTo0-3 and
LCSTo0-3 are driven low.
When HIGH, the outputs BSTo0-31, LSTo0-31, BCSTo0-3,
and LCSTo0-3 are enabled.
13
Description
Data Sheet
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