le79128 Zarlink Semiconductor, le79128 Datasheet - Page 37

• Manufacturer Part Number: le79128
• Description: Next Generation Voiceedge™ Control Processor Next Generation Carrier Chipset Ngcc
• Manufacturer: Zarlink Semiconductor

SPI Features
In order to connect to different SPI masters and share the same logic view with the General Purpose Parallel Interface, the SPI
slave of the VCP device has the following designs:
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Figure 17
clocks. For a two-word command, SS needs to toggle 4/2 times to complete the command transfer. In command framing mode,
SS is Low for the whole duration of the command transfer. When the command is finished, SS will go back to High. If SS Low
lasts shorter than the expected command length, the command is aborted and the SPI slave state machine resets. However, if
the user pulls SS Low longer than the expected command length, the extra words will start a new command sequence. In both
word framing mode and command framing mode, SCK can be free-running or absent when SS is inactive High.
Every time SS returns to High and the number of active SCK clocks is not equal to 8 or 16, the SPI slave state machine will reset.
The next SS Low starts a new command sequence. In command framing mode, the transition back to High means the end of the
command. If SS Low lasts less than 16 SCK clock cycles, no command byte is processed. If SS Low lasts more than 16 clock
cycles, each 16-clock cycles triggers the SPI slave to process the word until SS returns back to High. The SPI slave will not reset
the state machine when SS Low lasts exactly 8 or 16 SCK clock cycles to support byte/word framing mode. In byte/word framing
mode, the user has to be aware of the command length, as there is no indication of command boundary. For this reason,
command framing is recommended.
Separate SI and SO pins.
No read latency: no latency between the read command word and the first data word.
Data byte swap is supported.
SS pin supports byte/word framing, and command framing mode, as shown in Figure 17. The SPI slave state machine will
reset if SS returns to High when the number of active SCK clocks is not equal to 8 or 16. If there is no clock, SS has to be
Low for more than 125 ns to be recognized to reset SPI slave state machine. In command framing mode, the transition of
SS to High means the command has ended. This event resets the SPI slave state machine, and the next falling edge of SS
starts a new command.
shows three kinds of framing modes based on the behavior of SS. In byte/word framing mode, SS is Low for 8/16 SCK
Le79128 VCP
Figure 16. 3-Wire Master-Slave Connections
Microsemi Corporation - CMPG
Slave
SPI
Le79128
SCK
SS
SO
SI
37
MOSI
MISO
SCK
SCK
MOSI
MISO
SS
Preliminary Data Sheet
Master
SPI