ia186es Innovasic Semiconductor Inc., ia186es Datasheet - Page 71

• Manufacturer Part Number: ia186es
• Description: 8-bit/16-bit Microcontrollers
• Manufacturer: Innovasic Semiconductor Inc.

IA186ES/IA188ES
8-Bit/16-Bit Microcontrollers
5.1.11 D1TC (0d8h) and D0TC (0c8h)
DMA Transfer Count Registers. The DMA Transfer Count registers are maintained by each
DMA channel. They are decremented after each DMA cycle. The state of the TC bit in the
DMA control register has no influence on this activity. But, if unsynchronized transfers are
programmed or if the TC bit in the DMA control word is set, DMA activity ceases when the
transfer count register reaches 0. The D0TC and D1TC registers are undefined at reset (see
Table 27).
Table 27. DMA Transfer Count Registers
15
14
Note: Word transfers are not supported if the chip selects are programmed
for 8-bit transfers. The IA188ES does not support word transfers
Synchronization Bit Channel Selection
Bit [5]—P → Relative Priority. When set to 1, selects high priority for this channel
relative to the other channel during simultaneous transfers.
Bit [4]—TDRQ → Timer 2 Synchronization. When set to 1, enables DMA requests from
timer 2. When 0, disables them.
Bit [3]—EXT → External Interrupt Enable Bit. When set to 1, if the respective DMA
channel does not respond to changes on the drq pin, this pin functions as an int pin and
the interrupt controller processes requests on the pin. When 0, it functions as a drq pin.
Bit [2]—CHG → Change Start Bit. This bit must be set to 1 to allow modification of the
ST bit during a write. During a write, when CHG is set to 0, ST is not changed when
writing the control word. The result of reading this bit is always 0.
Bit [1]—ST → Start/Stop DMA Channel. When set to 1, the DMA channel is started.
The CHG bit must be set to 1 for this bit to be modified and only during the same register
write. A processor reset causes this bit to be set to 0.
Bit [0]—Bn/W → Byte/Word Select. When set to 1, word transfers are selected.
When 0, byte transfers are selected.
SYN1
13
0
0
1
1
12
SYN0
0
1
0
1
11
®
Unsynchronized
Source Synchronized
Destination Synchronized
Reserved
10
TC15–TC0
9
Sync Type
8
7
UNCONTROLLED WHEN PRINTED OR COPIED
6
5
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IA211050902-15
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December 24, 2008
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