uc1682 ETC-unknow, uc1682 Datasheet - Page 48

• Manufacturer Part Number: uc1682
• Description: 80 X 104rgb C-stn Lcd Controller-driver W/ 32-shade Per Dot, 12-bit Per Rgb
• Manufacturer: ETC-unknow

U
High-Voltage Mixed-Signal IC
P
UC1682 power-up sequence is simplified by built-in
“Power Ready” flags and the automatic invocation
of System-Reset command after Power-ON-Reset .
System programmers are only required to wait 5~
10 ms before the CPU starting to issue commands
to UC1682. No additional time sequences are
required between enabling the charge pump,
turning on the display drivers, writing to RAM or
any other commands. However, while turning on
V
Delay allowance between V
illustrated as Figure 15-1.
46
OWER
DD
LTRA
Figure 15: Reference Power-Up Sequence
, V
DD2/3
-U
P
C
S
should be started not later than V
HIP
EQUENCE
( Ignore OTP value when “L” )
T
Set LCD Bias Ratio (BR)
Set Potential Meter (PM)
f
< 10 mS
Set Display Enable
Wait 5~10 mS
Turn on VDD
Set OTPC[4]
Figure 15-1: Delay allowance and Power Off-On Sequence
T
Wait
DD
> 50 mS
and V
DD2/3
is
DD
.
T
1
T
P
To prevent the charge stored in capacitors C
C
switched off, use Reset mode to enable the built-in
draining circuit and discharge these capacitors.
The draining resistor is 1K Ÿ for both V
It is recommended to wait 3 x RC for V
x RC for V
draining time required for V
When internal V
drain V
to make sure external V
drained off before turning off V
Delay
OWER
BX–
Figure 16: Reference Power-Down Sequence
, and C
> 0 s
-D
LCD
OWN
B+
during RESET. System designers need
T
L
. For example, if C
2
from damaging the LCD, when V
S
EQUENCE
LCD
Reset command
is not used, UC1682 will NOT
Turn off VDD
10 ô S < T
Wait ~1 mS
LCD
LCD
source is properly
V
V
V
DD
L
is 0.5~1mS.
1
DD2/3
DD
DD2/3
, T
is 15nF, then the
.
2
< 10 mS
ES Specifications
> 2.4V
> 1.8V
> V
© 1999 ~ 2003
LCD
LCD
DD
and 1.5
and V
BX+
DD
,
B+
is
.