uc1682 ETC-unknow, uc1682 Datasheet - Page 26

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uc1682

Manufacturer Part Number
uc1682
Description
80 X 104rgb C-stn Lcd Controller-driver W/ 32-shade Per Dot, 12-bit Per Rgb
Manufacturer
ETC-unknow
Datasheet

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U
High-Voltage Mixed-Signal IC
(30) S
This command programs the starting COM electrode, which has been assigned a full scanning period and
will output an active COM scanning pulse.
(31) S
This command programs the ending COM electrode, which has been assigned a full scanning period and
will output an active COM scanning pulse.
CEN, DST, and DEN are 0-based index of COM electrodes. They control only the COM electrode activity,
and do not affect the mapping of display RAM to each COM electrodes. The image displayed by each pixel
row is therefore not affected by the setting of these three registers.
When LC[9]=1, two partial display modes are possible with UC1682:
When LC[9:8]=11b, the Mux-Rate is narrowed down to just the range between DST and DEN. When Mux-
Rate is under 32, set BR=5, PC[3:2]=01b, and adjust PM to reduce VLCD and achieve the lowest power
consumption. When LC[9:8]=10b, the Mux-Rate is still CEN+1. This is achieved by suppressing only the
scanning pulses, but not the scanning time slots, for COM electrodes that is outside of DST~DEN. Under
this mode, the gray-scale quality of the display is preserved, while the power can be reduced significantly. In
either case, DST/DEN defines a small subsection of the display which will remain active while shutting down
all the rest of the display to conserve energy.
(32) S
This command is to program the starting column address of RAM program window.
24
LC[8]=1: ON-OFF only, ultra-low-power mode (if Mux-Rate U 32, set BR=5).
LC[8]=0: Full gray shade low power mode (BR and PM stays the same)
LTRA
ET
ET
DST
DEN
CEN
ET
79
(Double byte command)
(Double byte command)
(Double byte command)
0
P
P
W
C
ARTIAL
ARTIAL
INDOW
HIP
Set WPC0
Set DEN
Set DST
Action
Action
Action
D
D
P
ISPLAY
ISPLAY
ROGRAM
S
E
TART
ND
S
TARTING
C
OLUMN
C/D W/R D7
C/D W/R D7
C/D W/R D7
0
0
0
0
A
DDRESS
0
0
0
0
1
1
1
WPC0[7:0] register parameter
D6
D6
D6
1
1
1
DEN register parameter
DST register parameter
D5
D5
D5
1
1
1
D4
D4
D4
1
1
1
D3
D3
D3
0
0
0
D2
D2
D2
0
0
1
Pulse Disable:
Pulse Enable:
Not Scanned:
D1
D1
D1
1
1
0
D0
D0
D0
0
1
0
ES Specifications
© 1999 ~ 2003

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