uc1682 ETC-unknow, uc1682 Datasheet - Page 35

• Manufacturer Part Number: uc1682
• Description: 80 X 104rgb C-stn Lcd Controller-driver W/ 32-shade Per Dot, 12-bit Per Rgb
• Manufacturer: ETC-unknow

I
UC1682 supports the following four different input
color formats.
256C (8-bit/RGB): This is the most compact
color mode, and is intended to minimize the bus
cycle required to refresh the display buffer. On-
chip extension circuit will automatically expand
the input RGB data into on-chip RAM buffer
format.
4KC (12-bit/RGB): In this color mode, G will be
extended while B will be dithered, and the input
data will be converted into 4R-5G-3B format
before they are stored to display RAM.
56KC (16-bit/RGB): On-chip dither engine will
convert the input data into internal 12-bit-per-
RGB pixel format and store it to on-chip display
RAM. This is the default mode.
221KC (24-bit/RGB): On-chip dither engine will
convert input data into 4R-5G-3B format and
store it to on-chip display RAM. This mode
provides the smoothest shades and the most
vivid color in the LCD.
Changing color mode does not affect the content
already stored in the display buffer RAM. Users
can use several color modes together in real time.
For example, the menu portion can be painted in
256-color mode for fast update speed, and then
switch to 221K-color mode, together with window
programming option, and take advantage of built-
in dither engine to produce smooth graphics
images.
L
Since the COM scanning pulse of UC1682 can
be as short as 30µS, it is critical to control the RC
delay of COM signal to minimize distortion of
COM scanning pulse.
For the best image quality, limit the worst case of
RC delay of COM signal as calculated below.
where
Revision 0.6
NPUT
AYOUT
(R
C
R
R
R
C
ROW
ROW
COM
OUT
OLOR
C
ROW
ONSIDERATIONS FOR
:
:
:
:
/ 2.7+ R
F
ORMATS
LCD loading capacitance of one
row of pixels. It can be calculated
by C
the LCD panel capacitance.
ITO resistance over one row of
pixels within the active area
COM routing resistance from IC to
the active area
COM output impedance
LCD
COM
/Mux-Rate, where C
+ R
OUT
COM
) x C
SIGNALS
ROW
< 2µS
LCD
is
In addition, please make sure
so that the COM distortions on the top of the
screen to the bottom of the screen are uniform.
L
Excessive SEG signal RC decay can cause
image dependent changes of medium gray
shades and sharply increase of SEG direction
crosstalk.
Please limit the worst case of SEG signal RC
delay as calculated below.
where
L
Excessive SEG signal RC decay can cause
image dependent changes of medium gray
shades and sharply increase of SEG direction
crosstalk.
For good image quality, please limit the worst
case of SEG signal RC delay as calculated below.
where
R
active area + SEG driver output impedance
AYOUT
AYOUT
SEG
:
| RC
(R
C
R
R
(R
C
R
COL
COL
SEG
COL
COL
C
C
COL
COL
SEG routing resistance from IC to the
ONSIDERATIONS FOR
ONSIDERATIONS FOR
MAX
:
:
:
:
:
/2.7 + R
/2.7 + R
– RC
pixel column. It can be calculated
by C
LCD panel capacitance.
pixels within the active area
SEG routing resistance from IC to
the active area + SEG driver
output impedance
pixel column. It can be calculated
by C
LCD panel capacitance.
pixels within the active area
LCD loading capacitance of one
ITO resistance over one column of
LCD loading capacitance of one
ITO resistance over one column of
80x104RGB CSTN Controller-Driver
MIN
SEG
LCD
SEG
LCD
| < 0.3 x RC
) x C
) x C
/ #_of column, C
/ #_of column, C
COL
COL
SEG
SEG
< 0.5µS
< 0.4µS
SIGNALS
SIGNALS
MAX
UC1682
LCD
LCD
is the
is the
33