hsp50210 Intersil Corporation, hsp50210 Datasheet - Page 39

• Manufacturer Part Number: hsp50210
• Description: Digital Costas Loop
• Manufacturer: Intersil Corporation

POSITION
POSITION
POSITION
31-28
26-20
19-10
31-16
31-16
15-0
15-0
BIT
BIT
BIT
9-0
27
Reserved
False Lock
Accumulator Operation
Dwell Counter
Pre-load
Integration Counter
Pre-Load
(Acquisition)
Integration Counter
Pre-Load (Track)
Lock Accumulator Pre-
Load
(Acquisition)
Lock Accumulator Pre-
Load (Track)
False Lock
Accumulator
Pre-Load (Acquisition)
False Lock
Accumulator
Pre-Load (Track)
FUNCTION
FUNCTION
FUNCTION
3-39
TABLE 36. FALSE LOCK ACCUMULATOR PRE-LOAD CONTROL REGISTER
TABLE 34. LOCK DETECTOR CONFIGURATION CONTROL REGISTER
TABLE 35. LOCK ACCUMULATOR PRE-LOADS CONTROL REGISTER
Reserved. Set to 0 for proper operation.
This bit selects the input to the False Lock Accumulator.
0 = Frequency Error input enabled to accumulator.
1 = False Lock Bit enabled to accumulator.
The Dwell Counter holds off the Lock Accumulator integration for the number of integration cycles
programmed here. The length of the integration cycle is set in the bit positions 19-10. The 7-bit value
programmed here should be set to 1 less than the desired hold off time in integration cycles. The pre-
load is zeroed during Track Mode. Only used during stepped acquisition mode.
The Integration Counter controls the number Phase Error samples accumulated by the Lock
Accumulator. The 10-bit number loaded here is set to two less than the number of Phase Error samples
desired in the Integration Period. Total Range 2-1025. Bit 19 is the MSB.
Function is identical to Acquisition Integration Counter Pre-Load. See above.
The lock threshold is set by an accumulator pre-load which is backed off from the accumulator full scale
by the threshold amount. The Lock Accumulator is 18 bits and the accumulator bit weightings relative to
the magnitude of the Phase Error input and the pre-load is given below:
The accumulator roll over is at the 2
Function is identical to Acquisition Lock Accumulation Pre-Load. See above.
Depending on configuration, the input to the False Lock Accumulator is either the false lock indicator bit
or the magnitude of the frequency error detector output. Like the Lock Accumulator, the threshold is set
by an accumulator pre-load that is backed off from accumulator full scale. The False Lock Accumulator
can accumulate sums up to 18 bits, and the bit weightings of the false lock indicator bit and the frequency
error input relative to accumulator full scale are shown below.
The accumulator roll over is at the 2
See above. The Lock Detector State Machine only uses the accumulator during the verify state during
which the Track parameters are used.
BIT WEIGHTING OF ACCUMULATOR PRE-LOAD
INARY POINT
DESTINATION ADDRESS = 20
DESTINATION ADDRESS = 21
DESTINATION ADDRESS = 22
2
10
2
BINARY POINT
9
2
HSP50210
BIT WEIGHTING OF ACCUMULATOR PRE-LOAD
8
2
2
7
10
......2
2
FREQUENCY ERROR MAGNITUDE
9
0
2
.
8
2
11
11
2
-1
7
BIT WEIGHTING OF
2
bit position.
bit position.
......2
-2
2
-3
DESCRIPTION
DESCRIPTION
DESCRIPTION
0
.
PHASE ERROR MAGNITUDE
2
2
-4
-1
BIT WEIGHTING OF
2
2
-5
-2
2
2
-6
-3
2
2
-7
-4
2
-5
FALSE LOCK INDICATOR BIT
2
-6
2
BIT WEIGHTING OF
-7