hsp50210 Intersil Corporation, hsp50210 Datasheet - Page 14

• Manufacturer Part Number: hsp50210
• Description: Digital Costas Loop
• Manufacturer: Intersil Corporation

NOTES:
Gain Distribution
The gain distribution in the DCL is shown in Figure 10.
These gains consist of a combination of fixed,
programmable, and adaptive gains. The fixed gains are
introduced by processing elements such as the Mixer and
Square Root of Root Raised Cosine Filter. The adaptive
gains are set to compensate for variations in input signal
strength.
The main signal path, with processing block gains and path
bit weightings, is shown in Figure 10. The quadrature inputs
to the HSP50210 are 10-bit fractional two’s complement
numbers with relative bit weightings, as shown in the
Figure 10. The first element in the processing chain is the
Mixer, which scales the quadrature outputs of the complex
multiplier by 1/2 providing a gain of G = 0.5. If the Mixer is
bypassed, the signal is passed unmodified with a gain of 1.0.
Following the mixer, the quadrature signal is passed to the
fixed coefficient RRC filtering block, which has a gain of 1.13
if enabled and 1.0 if bypassed. Next, the AGC supplies gain
to maintain an optimal signal level at the input to the Soft
Decision Slicer, Cartesian to Polar Converter, and the
Symbol Tracking Loop. The gain supplied by the AGC
ranges from 1.0 to 1.9844*2
1. If the Mixer is enabled the result of the complex multiply is scaled by two (G = 0.5). If the mixer is bypassed, the data passes unmodified (G = 1.0).
2. If the Root Raised Cosine Filter is enabled, a gain of G = 1.13 is introduced. If the RRC filters bypassed, the gain is unity.
3. If the integrate and Dump Filter is bypassed the Sample Pair summer has a gain of G = 1.0 and the 2
4. The negative sign on the MSBs indicates use of 2’s complement data format.
and dump is enabled, the sample pair sum is scaled by one half (G = 0.5).
BINARY
POINT
INPUT
G = 1.0, 0.5 (NOTE 1)
PART
SYNTHESIZER/
MIXER
INPUT TO CARTESIAN TO POLAR CONVERTER
-2
2
2
-1
-9
0
(NOTE 4)
3-14
3
G = 1.0, 1.13 (NOTE 2)
RND
.
2
-2
2
FIGURE 10. GAIN DISTRIBUTION AND INTERMEDIATE BIT WEIGHTINGS
-10
-1
0
IF AGC OUTPUT SELECTED
(0.0156 STEPS)
FILTER
MANTISSA
1.0 - 1.9844
RRC
-2
2
2
2
RND
G = 1.0 - 1.9844*2
0
-1
-10
1
AGC GAIN
G
AGC
-2
2
2
2
2
2
2
2
4
3
2
1
0
-1
-9
EXPONENT
5
3
2
HSP50210
0
M
L
T
I
I
-2
3
ACCUMULATOR
INPUT TO CARTESIAN TO POLAR CONVERTER
8
/
RND
-2
2
2
INT/DUMP
-1
-7
G = 1-16
0
Following the AGC, the signal path is limited to 8 bits and
passed through the Integrate and Dump Filter en route to the
Soft Decision Slicer and Symbol Tracking Block. The I&D
Filter uses an accumulator together with a sample pair
summer to achieve the desired decimation rate. The I&D
shifter is provided to compensate for the gain introduced by
the I&D Accumulator. The accumulator introduces gain equal
to the decimation factor R, and the shifter gain can be set to
1/R. For example, if the I&D Filter decimation of 16 is chosen
the I&D Accumulator will accumulate 8 samples before
dumping, which produces a gain of 8. Thus, for unity gain, the
I&D Shifter would be set for a gain of 2
Summer is unity gain since its output is scaled by one-half.
Symbol Tracking
The symbol tracking loop adjusts the baseband sampling
frequency to force sampling of the baseband waveform at
optimal points for data decisions. The key elements of this
loop are the Sampling Error Detector and Symbol Tracking
Loop Filter shown in Figure 11. The output of these two blocks
is a frequency correction term which is used to adjust the
baseband sample frequency external to the HSP50210. In
typical applications, the frequency correction term is fed back
to the HSP50110 to adjust baseband sampling via the
Resampling NCO (see HSP50110 Datasheet).
-2
2
2
IF INT/DUMP OUTPUT SELECTED
2
2
2
2
-1
-7
4
3
2
1
0
INT/DUMP
G = 2
SHIFTER
INTEGRATE AND
DUMP FILTER
0
- 2
2
-2
2
-11
-4
2
2
2
2
-1
4
3
2
1
0
M
L
T
I
I
-2
2
2
-7
G = 0.5, 1.0 (NOTE 3)
-1
-6
0
-bit position is set to 1. If the integrate
SAMPLE PAIR
SUMMER
-2
2
2
2
-7
-1
-6
0
INPUT TO
SOFT DECISION
SLICER
AND
SYMBOL TRACKING
BLOCK
-3
. The Sample Pair