ox16c954 ETC-unknow, ox16c954 Datasheet - Page 30

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ox16c954

Manufacturer Part Number
ox16c954
Description
High Performance Quad Uart With 128-byte Fifos Intel / Motorola Bus Interface
Manufacturer
ETC-unknow
Datasheet

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12 O
12.1 Divisor Latch Registers ‘DLL & DLM’
The divisor latch registers are used to program the baud
rate divisor. This is a value between 1 and 65535 by which
the input clock is divided by in order to generate serial
baud rates. After a hardware reset, the baud rate used by
the transmitter and receiver is given by:
Where divisor is given by DLL + ( 256 x DLM ). More
flexible baud rate generation options are also available.
See section 14 for full details.
Data Sheet Revision 1.0
OXFORD SEMICONDUCTOR LTD.
THER
Baudrate
S
TANDARD
16
InputClock
R
*
EGISTERS
Divisor
12.2 Scratch Pad Register ‘SPR’
The scratch pad register does not affect operation of the
rest of the UART in any way and can be used for
temporary data storage. The register may also be used to
define an offset value to access the registers in the
Indexed Control Register set. For more information on
Indexed Control registers see Table 7and section 15.
OX16C954 rev B
Page 30

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