ox16c954 ETC-unknow, ox16c954 Datasheet - Page 21
ox16c954
Manufacturer Part Number
ox16c954
Description
High Performance Quad Uart With 128-byte Fifos Intel / Motorola Bus Interface
Manufacturer
ETC-unknow
Datasheet
1.OX16C954.pdf
(54 pages)
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OX16C954 rev B
OXFORD SEMICONDUCTOR LTD.
To read or write to any of the Indexed Controlled Registers use the following procedure:
Writing to ICR registers:
Ensure that the last value written to LCR was not 0xBF (reserved for 650 compatible register access value).
Write the desired offset to SPR (address 111b).
Write the desired value to ICR (address 101b).
Reading from ICR registers:
Ensure that the last value written to LCR was not 0xBF (see above).
Write 0x00 offset to SPR to select ACR.
Set bit 6 of ACR (ICR read enable) by writing x1xxxxxxb to address 101b. Ensure that other bits in ACR are not changed.
(Software drivers should keep a copy of the contents of the ACR elsewhere since reading ICR involves overwriting ACR!)
Write the desired offset to SPR (address 111b).
Read the desired value from ICR (address 101b).
Write 0x00 offset to SPR to select ACR.
Clear bit 6 of ACR bye writing x0xxxxxxb to ICR, thus enabling access to standard registers again.
Data Sheet Revision 1.0
Page 21